drivers/spi/spi_flash: Pass in flash structure to fill in probe
Instead of making all SPI drivers allocate space for a spi_flash structure and fill it in, udpate the API to allow callers to pass in a spi_flash structure that can be filled by the flash drivers as required. This also cleans up the interface so that the callers can maintain and free the space for spi_flash structure as required. BUG=b:38330715 Change-Id: If6f1b403731466525c4690777d9b32ce778eb563 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19705 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
committed by
Furquan Shaikh
parent
fc1a123aa7
commit
30221b45e0
@@ -160,6 +160,7 @@ static void update_mrc_cache(void *unused)
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struct mrc_data_container *cache, *cache_base;
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u32 cache_size;
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int ret;
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struct spi_flash flash;
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if (!current) {
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printk(BIOS_ERR, "No MRC cache in cbmem. Can't update flash.\n");
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@@ -192,8 +193,7 @@ static void update_mrc_cache(void *unused)
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// 1. use spi_flash_probe() to find the flash, then
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spi_init();
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struct spi_flash *flash = spi_flash_probe(0, 0);
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if (!flash) {
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if (spi_flash_probe(0, 0, &flash)) {
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printk(BIOS_DEBUG, "Could not find SPI device\n");
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return;
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}
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@@ -212,7 +212,7 @@ static void update_mrc_cache(void *unused)
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"Need to erase the MRC cache region of %d bytes at %p\n",
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cache_size, cache_base);
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spi_flash_erase(flash, to_flash_offset(flash, cache_base),
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spi_flash_erase(&flash, to_flash_offset(&flash, cache_base),
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cache_size);
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/* we will start at the beginning again */
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@@ -221,7 +221,7 @@ static void update_mrc_cache(void *unused)
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// 4. write mrc data with flash->write()
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printk(BIOS_DEBUG, "Finally: write MRC cache update to flash at %p\n",
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cache);
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ret = spi_flash_write(flash, to_flash_offset(flash, cache),
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ret = spi_flash_write(&flash, to_flash_offset(&flash, cache),
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current->mrc_data_size + sizeof(*current), current);
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if (ret)
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