sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

spd.h: Move enum ddr5_module_type to ddr5.h

Browse Source 
Move specific enum ddr5_module_type to <device/dram/ddr5.h>.

Change-Id: Ie38d1e99fa46c278e60ced2d3eef29ca823d4b1d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
This commit is contained in:
Elyes Haouas
2024-04-30 22:38:25 +02:00
parent 9580e7fba8
commit 305ee06933
4 changed files with 18 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/device/dram/spd.c
View File

@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h> #include <device/dram/ddr2.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <device/dram/ddr5.h>
#include <device/dram/spd.h> #include <device/dram/spd.h>
#include <spd.h> #include <spd.h>
#include <stddef.h> #include <stddef.h>

16
src/include/device/dram/ddr5.h
View File

@@ -15,6 +15,22 @@
/** Maximum SPD size supported */ /** Maximum SPD size supported */
#define SPD_SIZE_MAX_DDR5 1024 #define SPD_SIZE_MAX_DDR5 1024
enum ddr5_module_type {
DDR5_SPD_RDIMM = 0x01,
DDR5_SPD_UDIMM = 0x02,
DDR5_SPD_SODIMM = 0x03,
DDR5_SPD_LRDIMM = 0x04,
DDR5_SPD_MINI_RDIMM = 0x05,
DDR5_SPD_MINI_UDIMM = 0x06,
DDR5_SPD_72B_SO_UDIMM = 0x08,
DDR5_SPD_72B_SO_RDIMM = 0x09,
DDR5_SPD_SOLDERED_DOWN = 0x0b,
DDR5_SPD_16B_SO_DIMM = 0x0c,
DDR5_SPD_32B_SO_RDIMM = 0x0d,
DDR5_SPD_1DPC = 0x0e,
DDR5_SPD_2DPC = 0x0f,
};
/** /**
* Converts DDR5 clock speed in MHz to the standard reported speed in MT/s * Converts DDR5 clock speed in MHz to the standard reported speed in MT/s
*/ */

16
src/include/spd.h
View File

@@ -215,22 +215,6 @@ enum ddr4_module_type {
DDR4_SPD_32B_SO_RDIMM = 0x0d, DDR4_SPD_32B_SO_RDIMM = 0x0d,
}; };
enum ddr5_module_type {
DDR5_SPD_RDIMM = 0x01,
DDR5_SPD_UDIMM = 0x02,
DDR5_SPD_SODIMM = 0x03,
DDR5_SPD_LRDIMM = 0x04,
DDR5_SPD_MINI_RDIMM = 0x05,
DDR5_SPD_MINI_UDIMM = 0x06,
DDR5_SPD_72B_SO_UDIMM = 0x08,
DDR5_SPD_72B_SO_RDIMM = 0x09,
DDR5_SPD_SOLDERED_DOWN = 0x0b,
DDR5_SPD_16B_SO_DIMM = 0x0c,
DDR5_SPD_32B_SO_RDIMM = 0x0d,
DDR5_SPD_1DPC = 0x0e,
DDR5_SPD_2DPC = 0x0f,
};
enum lpx_module_type { enum lpx_module_type {
LPX_SPD_LPDIMM = 0x07, LPX_SPD_LPDIMM = 0x07,
LPX_SPD_NONDIMM = 0x0e, LPX_SPD_NONDIMM = 0x0e,

1
tests/lib/dimm_info_util-test.c
View File

@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h> #include <device/dram/ddr2.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <device/dram/ddr5.h>
#include <dimm_info_util.h> #include <dimm_info_util.h>
#include <spd.h> #include <spd.h>
#include <tests/test.h> #include <tests/test.h>