sb/intel/lynxpoint: Move S3 check out of early_pch_init
Done for consistency with other platforms. This also drops redundant S3 resume logging, as `southbridge_detect_s3_resume` already prints it. Tested on Asrock B85M Pro4, still boots and still resumes from S3. Change-Id: Id96c5aedad80702ebf343dd0a351fbd4e7b1c6c1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
committed by
Patrick Georgi
parent
0b39379c9c
commit
30931f5a4d
@@ -6,7 +6,6 @@
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#include <device/pci_def.h>
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#include <device/smbus_host.h>
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#include <southbridge/intel/common/pmbase.h>
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#include <southbridge/intel/common/pmclib.h>
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#include <elog.h>
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#include "pch.h"
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#include "chip.h"
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@@ -86,10 +85,8 @@ void __weak mainboard_config_superio(void)
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{
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}
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int early_pch_init(void)
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void early_pch_init(void)
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{
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int wake_from_s3;
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pch_enable_bars();
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#if CONFIG(INTEL_LYNXPOINT_LP)
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@@ -123,11 +120,4 @@ int early_pch_init(void)
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RCBA32(0x2324) = 0x00854c74;
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}
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wake_from_s3 = southbridge_detect_s3_resume();
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elog_boot_notify(wake_from_s3);
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/* Report if we are waking from s3. */
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return wake_from_s3;
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}
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@@ -121,7 +121,7 @@ void pch_log_state(void);
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void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
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void enable_usb_bar(void);
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int early_pch_init(void);
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void early_pch_init(void);
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void pch_enable_lpc(void);
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void mainboard_config_superio(void);
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void mainboard_config_rcba(void);
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