soc/intel: Add Alder Lake's GT device ID

Add Alder Lake specific graphics device ID. The document# 641765 lists
the id 0x46a8.

TEST=Verify boot on brya

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I6f36256505a3e07c6197079ea2013991e841401b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55256
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/device/pci_ids.h

@@ -3816,6 +3816,7 @@
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_1			0x46b0
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_2			0x46a1
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3			0x46a3
+#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4			0x46a8
 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1			0x4680
 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1			0x46c0
 

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -103,6 +103,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
+	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
 };
 

src/soc/intel/common/block/graphics/graphics.c

@@ -299,6 +299,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_1,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_2,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_3,
+	PCI_DEVICE_ID_INTEL_ADL_P_GT2_4,
 	PCI_DEVICE_ID_INTEL_ADL_S_GT1,
 	PCI_DEVICE_ID_INTEL_ADL_M_GT1,
 	0,