soc/amd/common/block/acpimmio: add Kconfig option for biosram accessors
The biosram accessor support in soc/amd/common/block/acpimmio/biosram.c is only used on Stoneyridge and the old amd/southbridge code and not on Picasso or Cezanne. It also only builds as a 32 bit binary and breaks when trying to build as a 64 bit binary, since the size of an uintptr_t is different on those two. There is no support for using the 32 bit binaryPI with a 64 bit coreboot while there is code to use a 32 bit FSP with 64 bit coreboot, so not building this for FSP-based SoC support moves us one step closer to be able to build coreboot as 64 bit binary for Picasso and Cezanne. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2d87ec2fa1b217eaf55d865e4390308812502e56 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@@ -16,6 +16,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS
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select HAVE_CF9_RESET_PREPARE
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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config EHCI_BAR
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@@ -10,6 +10,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
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select HAVE_CF9_RESET_PREPARE
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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if SOUTHBRIDGE_AMD_CIMX_SB800
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@@ -16,6 +16,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS
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select HAVE_CF9_RESET_PREPARE
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM
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select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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