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riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

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Change-Id: Iabe390963bcbeb9ec6016faa8312d101431942da
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
This commit is contained in:
Xiang Wang
2019-03-20 12:04:43 +08:00
committed by Patrick Rudolph
parent b874ef4925
commit 3280aa7df2
1 changed files with 1 additions and 1 deletions
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2
src/arch/riscv/include/mcall.h
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@@ -27,7 +27,7 @@
#endif #endif
/* We save 37 registers, currently. */ /* We save 37 registers, currently. */
#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 8) #define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * __SIZEOF_POINTER__)
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__