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lib: Add new argument as ddr_type to smbios_bus_width_to_spd_width()

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Add DDR5 and LPDDR5 memory type checks while calculating bus width
extension (in bits).

Additionally, update all caller functions of
smbios_bus_width_to_spd_width() to pass `MemoryType` as argument.

Update `test_smbios_bus_width_to_spd_width()` to accommodate
different memory types.

Create new macro to fix incorrect bus width reporting
on platform with DDR5 and LPDDR5 memory.

With this code changes, on DDR5 system with 2 Ch per DIMM, 32 bit
primary bus width per Ch showed the Total width as:

Handle 0x000F, DMI type 17, 40 bytes
Memory Device
	Array Handle: 0x0009
	Error Information Handle: Not Provided
	Total Width: 80 bits
	Data Width: 64 bits
	Size: 16 GB
	...

BUG=b:194659789
Tested=On Alder Lake DDR5 RVP, SMBIOS type 17 shows expected `Total Width`.

Change-Id: I79ec64c9d522a34cb44b3f575725571823048380
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
This commit is contained in:
Subrata Banik
2021-10-26 13:19:20 +05:30
committed by Patrick Georgi
parent 35bcf5071c
commit 3306f37fd6
7 changed files with 52 additions and 24 deletions
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8
src/lib/dimm_info_util.c
View File

@ -5,7 +5,8 @@
#include <spd.h>
#include <console/console.h>
uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width)
uint8_t smbios_bus_width_to_spd_width(uint8_t ddr_type, uint16_t total_width,
uint16_t data_width)
{
uint8_t out;
@ -38,7 +39,10 @@ uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width)
switch (extension_bits) {
case 8:
out |= SPD_ECC_8BIT;
if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5)
out |= SPD_ECC_8BIT_LP5_DDR5;
else
out |= SPD_ECC_8BIT;
break;
case 0:
/* No extension bits */