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cpu/x86/pae/pgtbl.c: remove dead map_2M_page()

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This function isn't used anywhere. It probably wouldn't work with
current coreboot anyway, as it identity mapped lower 2GB of RAM, while
ramstage is run from CBMEM, which is usually just below top of memory.

It was last used in K8 code that is long gone.

Change-Id: I97e2830f381181d7f21ab5f6d4c544066c15b08c
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
This commit is contained in:
Krystian Hebel
2024-05-07 17:18:32 +02:00
committed by Felix Held
parent 7e7e569db4
commit 33192a3752
2 changed files with 0 additions and 66 deletions
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63
src/cpu/x86/pae/pgtbl.c
View File

@@ -213,69 +213,6 @@ int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
return 0; return 0;
} }
#if ENV_RAMSTAGE
void *map_2M_page(unsigned long page)
{
struct pde {
uint32_t addr_lo;
uint32_t addr_hi;
} __packed;
struct pg_table {
struct pde pd[2048];
struct pde pdp[512];
} __packed;
static struct pg_table pgtbl[CONFIG_MAX_CPUS]
__attribute__((aligned(4096)));
static unsigned long mapped_window[CONFIG_MAX_CPUS];
int index;
unsigned long window;
void *result;
int i;
index = cpu_index();
if (index < 0)
return MAPPING_ERROR;
window = page >> 10;
if (window != mapped_window[index]) {
paging_disable_pae();
if (window > 1) {
struct pde *pd, *pdp;
/* Point the page directory pointers at the page
* directories
*/
memset(&pgtbl[index].pdp, 0, sizeof(pgtbl[index].pdp));
pd = pgtbl[index].pd;
pdp = pgtbl[index].pdp;
pdp[0].addr_lo = ((uintptr_t)&pd[512*0])|1;
pdp[1].addr_lo = ((uintptr_t)&pd[512*1])|1;
pdp[2].addr_lo = ((uintptr_t)&pd[512*2])|1;
pdp[3].addr_lo = ((uintptr_t)&pd[512*3])|1;
/* The first half of the page table is identity mapped
*/
for (i = 0; i < 1024; i++) {
pd[i].addr_lo = ((i & 0x3ff) << 21) | 0xE3;
pd[i].addr_hi = 0;
}
/* The second half of the page table holds the mapped
* page
*/
for (i = 1024; i < 2048; i++) {
pd[i].addr_lo = ((window & 1) << 31)
| ((i & 0x3ff) << 21) | 0xE3;
pd[i].addr_hi = (window >> 1);
}
paging_enable_pae_cr3((uintptr_t)pdp);
}
mapped_window[index] = window;
}
if (window == 0)
result = (void *)(page << 21);
else
result = (void *)(0x80000000 | ((page & 0x3ff) << 21));
return result;
}
#endif
void paging_set_nxe(int enable) void paging_set_nxe(int enable)
{ {
msr_t msr = rdmsr(IA32_EFER); msr_t msr = rdmsr(IA32_EFER);

3
src/include/cpu/x86/pae.h
View File

@@ -40,9 +40,6 @@ int paging_enable_for_car(const char *pdpt_name, const char *pt_name);
* PAT defines above. 0 is returned on success, < 0 on failure. */ * PAT defines above. 0 is returned on success, < 0 on failure. */
int paging_identity_map_addr(uintptr_t base, size_t size, int pat); int paging_identity_map_addr(uintptr_t base, size_t size, int pat);
#define MAPPING_ERROR ((void *)0xffffffffUL)
void *map_2M_page(unsigned long page);
/* To be used with memset_pae */ /* To be used with memset_pae */
#define MEMSET_PAE_VMEM_ALIGN (2 * MiB) #define MEMSET_PAE_VMEM_ALIGN (2 * MiB)
#define MEMSET_PAE_VMEM_SIZE (2 * MiB) #define MEMSET_PAE_VMEM_SIZE (2 * MiB)