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amd/common/psp: Assume PSP command register already set up

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Remove the frequent setting/restoring of the PSP's bus-mastering and
memory decoding settings.  It is up to the caller to ensure it is
already set properly.

Change-Id: I7e29a3935df94d16de90b28ff78449d23fe01666
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marshall Dawson
2017-12-13 10:24:41 -07:00
committed by Martin Roth
parent 854d4dd9e2
commit 33c8773dfd
1 changed files with 16 additions and 35 deletions
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51
src/soc/amd/common/block/psp/psp.c
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@@ -122,56 +122,37 @@ static int wait_command(struct psp_mbox *mbox)
static int send_psp_command(u32 command, void *buffer) static int send_psp_command(u32 command, void *buffer)
{ {
u32 command_reg;
int status = 0;
struct psp_mbox *mbox = get_mbox_address(); struct psp_mbox *mbox = get_mbox_address();
if (!mbox) if (!mbox)
return -PSPSTS_NOBASE; return -PSPSTS_NOBASE;
command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND);
pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
/* check for PSP error conditions */ /* check for PSP error conditions */
if (rd_mbox_sts(mbox) & STATUS_HALT) { if (rd_mbox_sts(mbox) & STATUS_HALT)
status = -PSPSTS_HALTED; return -PSPSTS_HALTED;
goto exit;
} if (rd_mbox_sts(mbox) & STATUS_RECOVERY)
if (rd_mbox_sts(mbox) & STATUS_RECOVERY) { return -PSPSTS_RECOVERY;
status = -PSPSTS_RECOVERY;
goto exit;
}
/* PSP must be finished with init and ready to accept a command */ /* PSP must be finished with init and ready to accept a command */
if (wait_initialized(mbox)) { if (wait_initialized(mbox))
status = -PSPSTS_INIT_TIMEOUT; return -PSPSTS_INIT_TIMEOUT;
goto exit;
} if (wait_command(mbox))
if (wait_command(mbox)) { return -PSPSTS_CMD_TIMEOUT;
status = -PSPSTS_CMD_TIMEOUT;
goto exit;
}
/* set address of command-response buffer and write command register */ /* set address of command-response buffer and write command register */
wr_mbox_cmd_resp(mbox, buffer); wr_mbox_cmd_resp(mbox, buffer);
wr_mbox_cmd(mbox, command); wr_mbox_cmd(mbox, command);
/* PSP clears command register when complete */ /* PSP clears command register when complete */
if (wait_command(mbox)) { if (wait_command(mbox))
status = -PSPSTS_CMD_TIMEOUT; return -PSPSTS_CMD_TIMEOUT;
goto exit;
}
/* check delivery status */ /* check delivery status */
if (rd_mbox_sts(mbox) & (STATUS_ERROR | STATUS_TERMINATED)) { if (rd_mbox_sts(mbox) & (STATUS_ERROR | STATUS_TERMINATED))
status = -PSPSTS_SEND_ERROR; return -PSPSTS_SEND_ERROR;
goto exit;
} return 0;
exit:
/* restore command register to original value */
pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg);
return status;
} }
/* /*