AGESA,binaryPI: Add compatibility wrapper for romstage entry

This simplifies transition and reviews towards C environment
bootblock by allowing single cache_as_ram.S file to be used.

Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37352
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/cpu/amd/car.h

@@ -1,9 +0,0 @@
-#ifndef _CPU_AMD_CAR_H
-#define _CPU_AMD_CAR_H
-
-#include <arch/cpu.h>
-
-asmlinkage void romstage_main(unsigned long bist);
-asmlinkage void ap_romstage_main(void);
-
-#endif