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drivers/intel/fsp2_0: Add FSP 2.2 specific support

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• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Add multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Add FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
   o Added FspMultiPhaseSiInitEntryOffset
• Add FSPS_ARCH_UPD
   o Added EnableMultiPhaseSiliconInit, bootloaders designed for
     FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
     continue to use FspSiliconInit() without change.

FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html

Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41728
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik
2020-05-26 18:26:54 +05:30
committed by Duncan Laurie
parent f7841d03e2
commit 33d9c4ad7e
10 changed files with 175 additions and 13 deletions
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2
src/commonlib/include/commonlib/timestamp_serialized.h
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@@ -115,6 +115,8 @@ enum timestamp_id {
TS_FSP_AFTER_FINALIZE = 959,
TS_FSP_BEFORE_END_OF_FIRMWARE = 960,
TS_FSP_AFTER_END_OF_FIRMWARE = 961,
TS_FSP_MULTI_PHASE_SI_INIT_START = 962,
TS_FSP_MULTI_PHASE_SI_INIT_END = 963,
/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */