sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

device/pci_ops: Reuse romstage PCI config for ramstage

Browse Source 
By changing the signatures we do not need to define
PCI config accessors separately for ramstage.

Change-Id: I9364cb34fe8127972c772516a0a0b1d281c5ed00
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Kyösti Mälkki
2019-03-11 20:34:26 +02:00
parent 74aa99a543
commit 34cf5619f9
5 changed files with 54 additions and 120 deletions
Download Patch File Download Diff File Expand all files Collapse all files

52
src/device/pci_ops_mmconf.c
View File

@@ -14,6 +14,7 @@
#include <device/mmio.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_mmio_cfg.h>
#if (CONFIG_MMCONF_BASE_ADDRESS == 0)
#error "CONFIG_MMCONF_BASE_ADDRESS needs to be non-zero!"
@@ -23,52 +24,13 @@
* Functions for accessing PCI configuration space with mmconf accesses
*/
#define PCI_MMIO_ADDR(dev, reg, mask) \
((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\
(((dev)->bus->secondary & 0xFFF) << 20) |\
(((dev)->path.pci.devfn & 0xFF) << 12) |\
((reg) & 0xFFF)) & ~mask))
static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t reg)
{
return read8(PCI_MMIO_ADDR(dev, reg, 0));
}
static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t reg)
{
return read16(PCI_MMIO_ADDR(dev, reg, 1));
}
static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t reg)
{
return read32(PCI_MMIO_ADDR(dev, reg, 3));
}
static void pci_mmconf_write_config8(const struct device *dev, uint16_t reg,
uint8_t value)
{
write8(PCI_MMIO_ADDR(dev, reg, 0), value);
}
static void pci_mmconf_write_config16(const struct device *dev, uint16_t reg,
uint16_t value)
{
write16(PCI_MMIO_ADDR(dev, reg, 1), value);
}
static void pci_mmconf_write_config32(const struct device *dev, uint16_t reg,
uint32_t value)
{
write32(PCI_MMIO_ADDR(dev, reg, 3), value);
}
static const struct pci_bus_operations pci_ops_mmconf = {
.read8 = pci_mmconf_read_config8,
.read16 = pci_mmconf_read_config16,
.read32 = pci_mmconf_read_config32,
.write8 = pci_mmconf_write_config8,
.write16 = pci_mmconf_write_config16,
.write32 = pci_mmconf_write_config32,
.read8 = pci_mmio_read_config8,
.read16 = pci_mmio_read_config16,
.read32 = pci_mmio_read_config32,
.write8 = pci_mmio_write_config8,
.write16 = pci_mmio_write_config16,
.write32 = pci_mmio_write_config32,
};
const struct pci_bus_operations *pci_bus_default_ops(void)