Add code to set the clock speed for Winbond W83627THF/THG.
Change-Id: I984404dd1df50b3ba423ac610283b9bf8bca5a31 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/412 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
		
				
					committed by
					
						
						Stefan Reinauer
					
				
			
			
				
	
			
			
			
						parent
						
							3d1d6bb4ec
						
					
				
				
					commit
					355092b7b8
				
			@@ -45,3 +45,14 @@ static void inline w83627thg_enable_serial(device_t dev, u16 iobase)
 | 
				
			|||||||
	pnp_set_enable(dev, 1);
 | 
						pnp_set_enable(dev, 1);
 | 
				
			||||||
	pnp_exit_ext_func_mode(dev);
 | 
						pnp_exit_ext_func_mode(dev);
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#ifndef __ROMCC__
 | 
				
			||||||
 | 
					void w83627thg_set_clksel_48(device_t dev) {
 | 
				
			||||||
 | 
						u8 reg8;
 | 
				
			||||||
 | 
						pnp_enter_ext_func_mode(dev);
 | 
				
			||||||
 | 
						reg8 = pnp_read_config(dev, 0x24);
 | 
				
			||||||
 | 
						reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
 | 
				
			||||||
 | 
						pnp_write_config(dev, 0x24, reg8);
 | 
				
			||||||
 | 
						pnp_exit_ext_func_mode(dev);
 | 
				
			||||||
 | 
					}
 | 
				
			||||||
 | 
					#endif
 | 
				
			||||||
 
 | 
				
			|||||||
@@ -34,4 +34,6 @@
 | 
				
			|||||||
#define W83627THG_ACPI            10
 | 
					#define W83627THG_ACPI            10
 | 
				
			||||||
#define W83627THG_HWM             11   /* Hardware monitor */
 | 
					#define W83627THG_HWM             11   /* Hardware monitor */
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					void w83627thg_set_clksel_48(device_t dev);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 
 | 
				
			|||||||
		Reference in New Issue
	
	Block a user