Fix some of Peter's suggestions for the Nokia IP530.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/drivers/Kconfig

@@ -23,21 +23,3 @@ config DRIVERS_SIL
 	help
 	It sets PCI class to IDE compatible native mode, allowing
 	SeaBIOS, FILO etc... to boot from it.
-
-config DRIVERS_TI
-	bool
-
-config DRIVERS_TI_PCI1225
-	select DRIVERS_TI
-	bool
-
-config DRIVERS_TI_PCI1420
-	select DRIVERS_TI
-	bool
-
-config DRIVERS_TI_PCI1520
-	select DRIVERS_TI
-	bool
-
-config DRIVERS_DEC_21143PD
-	bool

src/drivers/dec/21143/Makefile.inc

@@ -1,2 +0,0 @@
-driver-$(CONFIG_DRIVERS_DEC_21143PD) += 21143pd.o
-

src/drivers/ti/pcmcia-cardbus/Makefile.inc

@@ -1,2 +0,0 @@
-driver-$(CONFIG_DRIVERS_TI) += ti-pcmcia-cardbus.o
-

src/include/device/pci_ids.h

@@ -696,7 +696,7 @@
 #define PCI_DEVICE_ID_TI_4410		0xac41
 #define PCI_DEVICE_ID_TI_4451		0xac42
 #define PCI_DEVICE_ID_TI_1420		0xac51
-#define PCI_DEVICE_ID_TI_1520		0xAC55
+#define PCI_DEVICE_ID_TI_1520		0xac55
 
 #define PCI_VENDOR_ID_SONY		0x104d
 #define PCI_DEVICE_ID_SONY_CXD3222	0x8039
@@ -1742,9 +1742,9 @@
 #define PCI_DEVICE_ID_CCD_B00C		0xb00c
 #define PCI_DEVICE_ID_CCD_B100		0xb100
 
-#define PCI_VENDOR_ID_NOKIA		0x13B8	// Nokia Telecommunications oy
+#define PCI_VENDOR_ID_NOKIA		0x13B8
-#define PCI_VENDOR_ID_NOKIA_WIRELESS	0x1603	// Nokia Wireless Communications
+#define PCI_VENDOR_ID_NOKIA_WIRELESS	0x1603
-#define PCI_VENDOR_ID_NOKIA_HOME	0x1622	// Nokia Home Communications
+#define PCI_VENDOR_ID_NOKIA_HOME	0x1622
 
 #define PCI_VENDOR_ID_3WARE		0x13C1
 #define PCI_DEVICE_ID_3WARE_1000	0x1000

src/mainboard/nokia/ip530/Kconfig

@@ -24,8 +24,8 @@ config BOARD_NOKIA_IP530
 	select NORTHBRIDGE_INTEL_I440BX
 	select SOUTHBRIDGE_INTEL_I82371EB
 	select SUPERIO_SMSC_SMSCSUPERIO
-	select DRIVERS_TI_PCI1225
+	select SOUTHBRIDGE_TI_PCI1X2X
-	select DRIVERS_DEC_21143PD
+	select SOUTHBRIDGE_DEC_21143
 	select BOARD_ROMSIZE_KB_256
 	select ROMCC
 	select PIRQ_ROUTE

src/southbridge/Kconfig

@@ -1,5 +1,6 @@
 source src/southbridge/amd/Kconfig
 source src/southbridge/broadcom/Kconfig
+source src/southbridge/dec/Kconfig
 source src/southbridge/intel/Kconfig
 source src/southbridge/nvidia/Kconfig
 source src/southbridge/ricoh/Kconfig

src/southbridge/Makefile.inc

@@ -1,5 +1,6 @@
 subdirs-y += amd
 subdirs-y += broadcom
+subdirs-y += dec
 subdirs-y += intel
 subdirs-y += nvidia
 subdirs-y += ricoh

src/southbridge/dec/21143/21143.c

@@ -40,9 +40,9 @@
 /**
  * This driver take the values from Kconfig and load them in the registers
  */
-static void dec_21143pd_enable( device_t dev )
+static void dec_21143_enable( device_t dev )
 {
-	printk( BIOS_DEBUG, "Init of DECchip 21143PD/TD Kconfig style\n");
+	printk( BIOS_DEBUG, "Init of DECchip 21143 Kconfig style\n");
 	// Command and Status Configuration Register (Offset 0x04)
 	pci_write_config32( dev, 0x04, CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION );
 	printk( BIOS_DEBUG, "0x04 = %08x (07 01 80 02)\n", pci_read_config32(dev, 0x04) );
@@ -55,16 +55,16 @@ static void dec_21143pd_enable( device_t dev )
 	return;
 }
 
-static struct device_operations dec_21143pd_ops  = {
+static struct device_operations dec_21143_ops  = {
         .read_resources   = pci_dev_read_resources,
         .set_resources    = pci_dev_set_resources,
         .enable_resources = pci_dev_enable_resources,
-        .init             = dec_21143pd_enable,
+        .init             = dec_21143_enable,
         .scan_bus         = 0,
 };
 
-static const struct pci_driver dec_21143pd_driver __pci_driver = {
+static const struct pci_driver dec_21143_driver __pci_driver = {
-        .ops    = &dec_21143pd_ops,
+        .ops    = &dec_21143_ops,
         .vendor = PCI_VENDOR_ID_DEC,
         .device = PCI_DEVICE_ID_DEC_21142,
 };

src/southbridge/dec/21143/Kconfig

@@ -0,0 +1,2 @@
+config SOUTHBRIDGE_DEC_21143
+	bool

src/southbridge/dec/21143/Makefile.inc

@@ -0,0 +1,2 @@
+driver-y += 21143.o
+

src/southbridge/dec/Kconfig

@@ -0,0 +1 @@
+source src/southbridge/dec/21143/Kconfig

src/southbridge/dec/Makefile.inc

@@ -0,0 +1 @@
+subdirs-$(CONFIG_SOUTHBRIDGE_DEC_21143) += 21143

src/southbridge/ti/Kconfig

@@ -19,3 +19,4 @@
 
 source src/southbridge/ti/pci7420/Kconfig
 source src/southbridge/ti/pcixx12/Kconfig
+source src/southbridge/ti/pci1x2x/Kconfig

src/southbridge/ti/Makefile.inc

@@ -19,3 +19,4 @@
 
 subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCI7420) += pci7420
 subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCIXX12) += pcixx12
+subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCI1X2X) += pci1x2x

src/southbridge/ti/pci1x2x/Kconfig

@@ -0,0 +1,2 @@
+config SOUTHBRIDGE_TI_PCI1X2X
+	bool

src/southbridge/ti/pci1x2x/Makefile.inc

@@ -0,0 +1 @@
+driver-$(CONFIG_SOUTHBRIDGE_TI_PCI1X2X) += pci1x2x.o

src/southbridge/ti/pci1x2x/pci1x2x.c

@@ -65,27 +65,20 @@ static struct device_operations ti_pci1x2y_ops  = {
 	.scan_bus         = 0,
 };
 
-#ifdef CONFIG_DRIVERS_TI_PCI1225
 static const struct pci_driver ti_pci1225_driver __pci_driver = {
         .ops    = &ti_pci1x2y_ops,
         .vendor = PCI_VENDOR_ID_TI,
         .device = PCI_DEVICE_ID_TI_1225,
 };
 
-#endif
-#ifdef CONFIG_DRIVERS_TI_PCI1420
 static const struct pci_driver ti_pci1420_driver __pci_driver = {
         .ops    = &ti_pci1x2y_ops,
         .vendor = PCI_VENDOR_ID_TI,
         .device = PCI_DEVICE_ID_TI_1420,
 };
-#endif
+
-#ifdef CONFIG_DRIVERS_TI_PCI1520
 static const struct pci_driver ti_pci1520_driver __pci_driver = {
         .ops    = &ti_pci1x2y_ops,
         .vendor = PCI_VENDOR_ID_TI,
         .device = PCI_DEVICE_ID_TI_1420,
 };
-#endif
-
-