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soc/amd/common/include/spi: add and use SPI_MISC_CNTRL define

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This register is currently used by the SPI DMA code that sets an
undocumented bit. A later patch will add and use some other bit in this
register.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I48447dcfb3cee07619a9b42434731f0b21458021
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83773
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
2024-08-06 18:12:37 +02:00
parent c3245274e9
commit 35946f957a
2 changed files with 4 additions and 2 deletions
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2
src/soc/amd/common/block/include/amdblocks/spi.h
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@@ -76,6 +76,8 @@ enum spi100_speed {
#define SPI_FIFO_LAST_BYTE 0xc6 /* 0xc7 for Cezanne */ #define SPI_FIFO_LAST_BYTE 0xc6 /* 0xc7 for Cezanne */
#define SPI_FIFO_DEPTH (SPI_FIFO_LAST_BYTE - SPI_FIFO + 1) #define SPI_FIFO_DEPTH (SPI_FIFO_LAST_BYTE - SPI_FIFO + 1)
#define SPI_MISC_CNTRL 0xfc
struct spi_config { struct spi_config {
/* /*
* Default values if not overridden by mainboard: * Default values if not overridden by mainboard:

4
src/soc/amd/common/block/lpc/spi_dma.c
View File

@@ -277,9 +277,9 @@ uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table)
static void spi_dma_fix(void) static void spi_dma_fix(void)
{ {
/* Internal only registers */ /* Internal only registers */
uint8_t val = spi_read8(0xfc); uint8_t val = spi_read8(SPI_MISC_CNTRL);
val |= BIT(6); val |= BIT(6);
spi_write8(0xfc, val); spi_write8(SPI_MISC_CNTRL, val);
} }
void boot_device_init(void) void boot_device_init(void)