sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more

Browse Source 
appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from
some mainboards.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2010-03-28 21:26:54 +00:00
committed by Stefan Reinauer
parent 83a1dd850b
commit 35b6bbb721
31 changed files with 53 additions and 188 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/include/cpu/x86/cache.h
View File

@@ -41,8 +41,8 @@ static inline void disable_cache(void)
wbinvd();
}
#if !defined( __ROMCC__) && !defined(__PRE_RAM__) && defined (__GNUC__)
#if !defined(__PRE_RAM__)
void x86_enable_cache(void);
#endif /* !__ROMCC__ */
#endif
#endif /* CPU_X86_CACHE */

8
src/include/cpu/x86/lapic.h
View File

@@ -69,7 +69,7 @@ static inline __attribute__((always_inline)) void stop_this_cpu(void)
void stop_this_cpu(void);
#endif
#if ! defined (__ROMCC__) && !defined(__PRE_RAM__)
#if !defined(__PRE_RAM__)
#define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
@@ -106,7 +106,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
return x;
}
static inline void lapic_write_atomic(unsigned long reg, unsigned long v)
{
xchg((volatile unsigned long *)(LAPIC_DEFAULT_BASE+reg), v);
@@ -150,14 +149,11 @@ static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)
void setup_lapic(void);
#if CONFIG_SMP == 1
struct device;
int start_cpu(struct device *cpu);
#endif /* CONFIG_SMP */
#endif /* !__ROMCC__ && !__PRE_RAM__ */
#endif /* !__PRE_RAM__ */
#endif /* CPU_X86_LAPIC_H */

3
src/include/cpu/x86/msr.h
View File

@@ -1,7 +1,7 @@
#ifndef CPU_X86_MSR_H
#define CPU_X86_MSR_H
#if defined( __ROMCC__)
#if defined(__ROMCC__)
typedef __builtin_msr_t msr_t;
@@ -45,5 +45,4 @@ static inline void wrmsr(unsigned index, msr_t msr)
#endif /* __ROMCC__ */
#endif /* CPU_X86_MSR_H */

7
src/include/cpu/x86/mtrr.h
View File

@@ -32,18 +32,15 @@
#define MTRRfix4K_F8000_MSR 0x26f
#if !defined(__ROMCC__) && !defined (ASSEMBLY) && !defined(__PRE_RAM__)
#if !defined (ASSEMBLY) && !defined(__PRE_RAM__)
#include <device/device.h>
void enable_fixed_mtrr(void);
void x86_setup_var_mtrrs(unsigned address_bits);
void x86_setup_mtrrs(unsigned address_bits);
int x86_mtrr_check(void);
void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res);
void x86_setup_fixed_mtrrs(void);
#endif /* __ROMCC__ */
#endif
#endif /* CPU_X86_MTRR_H */

3
src/include/cpu/x86/tsc.h
View File

@@ -17,7 +17,8 @@ static inline tsc_t rdtsc(void)
return res;
}
#if !defined( __ROMCC__ ) && !defined (__PRE_RAM__)
#if !defined(__ROMCC__)
/* Too many registers for ROMCC */
static inline unsigned long long rdtscll(void)
{
unsigned long long val;