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VIA southbridge K8T890: Apply un-written naming rules

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Use separate Kconfig option to select a driver directory for
build and the specific type of southbridge to support.

Change-Id: I9482d4ea0f0234b9b7ff38144e45022ab95cf3f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/685
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki
2012-02-25 17:14:20 +02:00
committed by Patrick Georgi
parent 7863015c3e
commit 35e1c861f5
13 changed files with 45 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/asus/a8v-e_deluxe/Kconfig
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@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8T890 select SOUTHBRIDGE_VIA_K8T890
select SOUTHBRIDGE_VIA_SUBTYPE_K8T890
select SUPERIO_WINBOND_W83627EHG select SUPERIO_WINBOND_W83627EHG
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES

1
src/mainboard/asus/a8v-e_se/Kconfig
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@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8T890 select SOUTHBRIDGE_VIA_K8T890
select SOUTHBRIDGE_VIA_SUBTYPE_K8T890
select SUPERIO_WINBOND_W83627EHG select SUPERIO_WINBOND_W83627EHG
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES

3
src/mainboard/asus/k8v-x/Kconfig
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@@ -7,7 +7,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8T800_OLD select SOUTHBRIDGE_VIA_K8T890
select SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
select SUPERIO_WINBOND_W83697HF select SUPERIO_WINBOND_W83697HF
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES

3
src/mainboard/asus/m2v-mx_se/Kconfig
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@@ -26,7 +26,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8M890 select SOUTHBRIDGE_VIA_K8T890
select SOUTHBRIDGE_VIA_SUBTYPE_K8M890
select SUPERIO_ITE_IT8712F select SUPERIO_ITE_IT8712F
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES

1
src/mainboard/asus/m2v/Kconfig
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@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_VT8237R
select SOUTHBRIDGE_VIA_K8T890 select SOUTHBRIDGE_VIA_K8T890
select SOUTHBRIDGE_VIA_SUBTYPE_K8T890
select SUPERIO_ITE_IT8712F select SUPERIO_ITE_IT8712F
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
select RAMINIT_SYSINFO select RAMINIT_SYSINFO

2
src/northbridge/amd/amdk8/incoherent_ht.c
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@@ -149,7 +149,7 @@ static uint16_t ht_read_freq_cap(device_t dev, uint8_t pos)
printk(BIOS_SPEW, "pos=0x%x, filtered freq_cap=0x%x\n", pos, freq_cap); printk(BIOS_SPEW, "pos=0x%x, filtered freq_cap=0x%x\n", pos, freq_cap);
#if CONFIG_SOUTHBRIDGE_VIA_K8M890 == 1 #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890 == 1
freq_cap &= 0x3f; freq_cap &= 0x3f;
printk(BIOS_INFO, "Limiting HT to 800/600/400/200 MHz until K8M890 HT1000 is fixed.\n"); printk(BIOS_INFO, "Limiting HT to 800/600/400/200 MHz until K8M890 HT1000 is fixed.\n");
#endif #endif

6
src/southbridge/via/Makefile.inc
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@@ -1,9 +1,5 @@
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD) += k8t890 # lspci lists B188 and 3188
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800) += k8t890 # lspci lists 0282, 1282, 2282, 3282, and 7282
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800PRO) += k8t890 # lspci lists 0282, 1282, 2282, 3282, and 7282
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8M800) += k8t890
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T890) += k8t890 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T890) += k8t890
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8M890) += k8t890
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8231) += vt8231 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8231) += vt8231
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8235) += vt8235 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8235) += vt8235
subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8237R) += vt8237r subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8237R) += vt8237r

32
src/southbridge/via/k8t890/Kconfig
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@@ -1,25 +1,26 @@
config SOUTHBRIDGE_VIA_K8M800 #K8M800 not tested
bool
config SOUTHBRIDGE_VIA_K8T800_OLD # not tested
bool
config SOUTHBRIDGE_VIA_K8T800
bool
config SOUTHBRIDGE_VIA_K8T800PRO
bool
config SOUTHBRIDGE_VIA_K8M890
bool
config SOUTHBRIDGE_VIA_K8T890 config SOUTHBRIDGE_VIA_K8T890
bool bool
if SOUTHBRIDGE_VIA_K8T890
config SOUTHBRIDGE_VIA_SUBTYPE_K8M800 # not tested
def_bool n
config SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD # not tested, lspci lists B188 and 3188
def_bool n
config SOUTHBRIDGE_VIA_SUBTYPE_K8T800 # lspci lists 0282, 1282, 2282, 3282, and 7282
def_bool n
config SOUTHBRIDGE_VIA_SUBTYPE_K8T800PRO # lspci lists 0282, 1282, 2282, 3282, and 7282
def_bool n
config SOUTHBRIDGE_VIA_SUBTYPE_K8M890
def_bool n
config SOUTHBRIDGE_VIA_SUBTYPE_K8T890
def_bool n
config SOUTHBRIDGE_VIA_K8M890_VGA_EN config SOUTHBRIDGE_VIA_K8M890_VGA_EN
bool "Enable onboard K8M890 graphics" bool "Enable onboard K8M890 graphics"
default y default y
depends on SOUTHBRIDGE_VIA_K8M890 depends on SOUTHBRIDGE_VIA_SUBTYPE_K8M890
select VGA select VGA
select GFXUMA select GFXUMA
@@ -50,3 +51,4 @@ config VIDEO_MB
default -1 if K8M890_VIDEO_MB_CMOS default -1 if K8M890_VIDEO_MB_CMOS
depends on SOUTHBRIDGE_VIA_K8M890_VGA_EN depends on SOUTHBRIDGE_VIA_K8M890_VGA_EN
endif # SOUTHBRIDGE_K8T890

4
src/southbridge/via/k8t890/bridge.c
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@@ -33,7 +33,7 @@ static void bridge_enable(struct device *dev)
writeback(dev, 0x40, 0x91); writeback(dev, 0x40, 0x91);
writeback(dev, 0x41, 0x40); writeback(dev, 0x41, 0x40);
writeback(dev, 0x43, 0x44); writeback(dev, 0x43, 0x44);
#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
writeback(dev, 0x42, 0x80); writeback(dev, 0x42, 0x80);
writeback(dev, 0x44, 0x35); writeback(dev, 0x44, 0x35);
#else #else
@@ -49,7 +49,7 @@ static void bridge_enable(struct device *dev)
* (Forward VGA compatible memory and I/O cycles ) * (Forward VGA compatible memory and I/O cycles )
*/ */
#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
writeback(dev, 0x3e, 0x0a); writeback(dev, 0x3e, 0x0a);
#else #else
writeback(dev, 0x3e, 0x16); writeback(dev, 0x3e, 0x16);

8
src/southbridge/via/k8t890/ctrl.c
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@@ -51,11 +51,11 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
pci_write_config8(dev, 0x70, 0xc2); pci_write_config8(dev, 0x70, 0xc2);
/* PCI Control */ /* PCI Control */
#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
pci_write_config8(dev, 0x72, 0xee); pci_write_config8(dev, 0x72, 0xee);
#endif #endif
pci_write_config8(dev, 0x73, 0x01); pci_write_config8(dev, 0x73, 0x01);
#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
pci_write_config8(dev, 0x74, 0x64); pci_write_config8(dev, 0x74, 0x64);
pci_write_config8(dev, 0x75, 0x3f); pci_write_config8(dev, 0x75, 0x3f);
#else #else
@@ -63,7 +63,7 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
pci_write_config8(dev, 0x75, 0x0f); pci_write_config8(dev, 0x75, 0x0f);
#endif #endif
pci_write_config8(dev, 0x76, 0x50); pci_write_config8(dev, 0x76, 0x50);
#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
pci_write_config8(dev, 0x77, 0x08); pci_write_config8(dev, 0x77, 0x08);
#endif #endif
pci_write_config8(dev, 0x78, 0x01); pci_write_config8(dev, 0x78, 0x01);
@@ -160,7 +160,7 @@ static void ctrl_init(struct device *dev)
/* PCI CFG Address bits[27:24] are used as extended register address /* PCI CFG Address bits[27:24] are used as extended register address
bit[11:8] */ bit[11:8] */
#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
pci_write_config8(dev, 0x47, 0x30); pci_write_config8(dev, 0x47, 0x30);
#endif #endif

16
src/southbridge/via/k8t890/early_car.c
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@@ -35,7 +35,7 @@
/* AMD K8 LDT0, LDT1, LDT2 Link Control Registers */ /* AMD K8 LDT0, LDT1, LDT2 Link Control Registers */
static u8 ldtreg[3] = {0x86, 0xa6, 0xc6}; static u8 ldtreg[3] = {0x86, 0xa6, 0xc6};
#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
#define K8X8XX_HT_CFG_BASE 0xc0 #define K8X8XX_HT_CFG_BASE 0xc0
#else #else
#define K8X8XX_HT_CFG_BASE 0x60 #define K8X8XX_HT_CFG_BASE 0x60
@@ -53,7 +53,7 @@ u8 k8t890_early_setup_ht(void)
u8 cldtwidth_in, cldtwidth_out, vldtwidth_in, vldtwidth_out, ldtnr, width; u8 cldtwidth_in, cldtwidth_out, vldtwidth_in, vldtwidth_out, ldtnr, width;
u16 vldtcaps; u16 vldtcaps;
#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
u8 reg; u8 reg;
/* hack, enable NVRAM in chipset */ /* hack, enable NVRAM in chipset */
@@ -79,21 +79,21 @@ u8 k8t890_early_setup_ht(void)
ldtnr = 2; ldtnr = 2;
} }
#if CONFIG_SOUTHBRIDGE_VIA_K8M800 #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M800
print_debug("K8M800 found at LDT "); print_debug("K8M800 found at LDT ");
#elif CONFIG_SOUTHBRIDGE_VIA_K8T800 #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800
print_debug("K8T800 found at LDT "); print_debug("K8T800 found at LDT ");
#elif CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
print_debug("K8T800_OLD found at LDT "); print_debug("K8T800_OLD found at LDT ");
pci_write_config8(PCI_DEV(0, 0x0, 0), 0x64, 0x00); pci_write_config8(PCI_DEV(0, 0x0, 0), 0x64, 0x00);
pci_write_config8(PCI_DEV(0, 0x0, 0), 0xdd, 0x50); pci_write_config8(PCI_DEV(0, 0x0, 0), 0xdd, 0x50);
#elif CONFIG_SOUTHBRIDGE_VIA_K8T800PRO #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800PRO
print_debug("K8T800 Pro found at LDT "); print_debug("K8T800 Pro found at LDT ");
#elif CONFIG_SOUTHBRIDGE_VIA_K8M890 #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890
print_debug("K8M890 found at LDT "); print_debug("K8M890 found at LDT ");
/* K8M890 fix HT delay */ /* K8M890 fix HT delay */
pci_write_config8(PCI_DEV(0, 0x0, 2), 0xab, 0x22); pci_write_config8(PCI_DEV(0, 0x0, 2), 0xab, 0x22);
#elif CONFIG_SOUTHBRIDGE_VIA_K8T890 #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T890
print_debug("K8T890 found at LDT "); print_debug("K8T890 found at LDT ");
#endif #endif
print_debug_hex8(ldtnr); print_debug_hex8(ldtnr);

6
src/southbridge/via/k8t890/romstrap.inc
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@@ -33,7 +33,7 @@ __romstrap_start:
* Below are some Dev0 Func2 HT control registers values, * Below are some Dev0 Func2 HT control registers values,
* depending on strap pin, one of below lines is used. * depending on strap pin, one of below lines is used.
*/ */
#if CONFIG_SOUTHBRIDGE_VIA_K8M800 || CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
tblpointer: tblpointer:
.long 0x50220000, 0X619707C2 .long 0x50220000, 0X619707C2
@@ -52,7 +52,7 @@ tblpointer:
.long 0x0 .long 0x0
.long 0x0 .long 0x0
#elif CONFIG_SOUTHBRIDGE_VIA_K8M890 #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890
tblpointer: tblpointer:
.long 0x504400FF, 0x61970FC2 //;200M .long 0x504400FF, 0x61970FC2 //;200M
@@ -72,7 +72,7 @@ tblpointer:
.long 0x0 .long 0x0
#elif CONFIG_SOUTHBRIDGE_VIA_K8T890 #elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T890
tblpointer: tblpointer:
.long 0x504400AA, 0x61970FC2 //;200M .long 0x504400AA, 0x61970FC2 //;200M

2
src/southbridge/via/vt8237r/lpc.c
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@@ -322,7 +322,7 @@ static void vt8237r_init(struct device *dev)
pci_write_config8(dev, 0x48, 0x0c); pci_write_config8(dev, 0x48, 0x0c);
#else #else
#if CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD
/* It seems that when we pair with the K8T800, we need to disable /* It seems that when we pair with the K8T800, we need to disable
* the A2 mask * the A2 mask
*/ */