Cleanup Persimmon mainboard whitespace.

Change-Id: I389bde86c5583a4fb37a699162b65b475ed94ddc
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/427
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/mainboard/amd/persimmon/BiosCallOuts.c

@@ -83,10 +83,8 @@ AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 
 	CalloutStatus = AGESA_UNSUPPORTED;
 
-  for (i = 0; i < CallOutCount; i++)
+	for (i = 0; i < CallOutCount; i++) {
-  {
+		if (BiosCallouts[i].CalloutName == Func) {
-    if (BiosCallouts[i].CalloutName == Func)
-    {
 			CalloutStatus = BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr);
 			return CalloutStatus;
 		}
@@ -153,7 +151,6 @@ AGESA_STATUS BiosAllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 			/* If BufferHandle has not been allocated on the heap, CurrNodePtr here points
 			 to the end of the allocated nodes list.
 			*/
-
 		}
 		/* Find the node that best fits the requested buffer size */
 		FreedNodeOffset = BiosHeapBasePtr->StartOfFreedNodes;
@@ -286,7 +283,6 @@ AGESA_STATUS BiosDeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 			/* Clear the BufferSize and NextNodeOffset of the previous first node */
 			FreedNodePtr->BufferSize = 0;
 			FreedNodePtr->NextNodeOffset = 0;
-
 		} else {
 			/* Otherwise, add freed node to the start of the list
 			 Update NextNodeOffset and BufferSize to include the
@@ -333,7 +329,6 @@ AGESA_STATUS BiosDeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 		if (AllocNodeOffset == EndNodeOffset) {
 			PrevNodePtr->NextNodeOffset = AllocNodePtr->NextNodeOffset;
 			PrevNodePtr->BufferSize += AllocNodePtr->BufferSize;
-
 			AllocNodePtr->BufferSize = 0;
 			AllocNodePtr->NextNodeOffset = 0;
 		} else {
@@ -559,8 +554,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 	switch (ResetInfo->ResetId)
 	{
 	case 4:
-      switch (ResetInfo->ResetControl)
+		switch (ResetInfo->ResetControl) {
-      {
 			case AssertSlotReset:
 			Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
 			Data8 &= ~(UINT8)BIT6 ;
@@ -576,8 +570,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 		}
 		break;
 	case 6:
-      switch (ResetInfo->ResetControl)
+		switch (ResetInfo->ResetControl) {
-      {
 			case AssertSlotReset:
 			Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
 			Data8 &= ~(UINT8)BIT6 ;
@@ -593,8 +586,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
 		}
 		break;
 	case 7:
-      switch (ResetInfo->ResetControl)
+		switch (ResetInfo->ResetControl) {
-      {
 			case AssertSlotReset:
 			Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
 			Data8 &= ~(UINT8)BIT6 ;

src/mainboard/amd/persimmon/Kconfig

@@ -123,7 +123,6 @@ config VGA_BIOS_ID
 	string
 	default "1002,9802"
 
-
 config SB800_AHCI_ROM
 	bool
 	default n
@@ -137,4 +136,3 @@ config WARNINGS_ARE_ERRORS
 	default n
 
 endif # BOARD_AMD_PERSIMMON
-

src/mainboard/amd/persimmon/acpi_tables.c

@@ -62,13 +62,14 @@ unsigned long acpi_fill_madt(unsigned long current)
 	current = acpi_create_madt_lapics(current);
 
 	/* Write SB800 IOAPIC, only one */
-  current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS,
+	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
-             IO_APIC_ADDR, 0);
+				CONFIG_MAX_CPUS, IO_APIC_ADDR, 0);
 
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 			current, 0, 0, 2, 0);
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
 			current, 0, 9, 9, 0xF);
+
 	/* 0: mean bus 0--->ISA */
 	/* 0: PIC 0 */
 	/* 2: APIC 2 */

src/mainboard/amd/persimmon/agesawrapper.c

@@ -275,8 +275,7 @@ agesawrapper_amdinitpost (
 	BiosManagerPtr = (BIOS_HEAP_MANAGER *)BIOS_HEAP_START_ADDRESS;
 
 	HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
-  for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++)
+	for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
-  {
 		*HeadPtr = 0x00000000;
 		HeadPtr++;
 	}

src/mainboard/amd/persimmon/buildOpts.c

@@ -271,12 +271,12 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
  * version string as appropriate for the release. The trunk copy of this file
  * should also be updated/incremented for the next expected version, + trailing 'X'
  ****************************************************************************/
-                  // This is the delivery package title, "BrazosPI"
+// This is the delivery package title, "BrazosPI"
-                  // This string MUST be exactly 8 characters long
+// This string MUST be exactly 8 characters long
 #define AGESA_PACKAGE_STRING	{'c', 'b', '_', 'A', 'g', 'e', 's', 'a'}
 
-                  // This is the release version number of the AGESA component
+// This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
+// This string MUST be exactly 12 characters long
 #define AGESA_VERSION_STRING	{'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '}
 
 /* MEMORY_BUS_SPEED */

src/mainboard/amd/persimmon/devicetree.cb

@@ -105,4 +105,3 @@ chip northbridge/amd/agesa/family14/root_complex
 		end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
 	end #pci_domain
 end #northbridge/amd/agesa/family14/root_complex
-

src/mainboard/amd/persimmon/dimmSpd.c

@@ -31,8 +31,8 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
 */
 
 static const UINT8 spdAddressLookup [2] [2] [4] =	// socket, channel, dimm
-   {
+{
-   // socket 0
+// socket 0
 	{
 		{0xA0, 0xA2},	// channel 0 dimms
 		{0x00, 0x00},	// channel 1 dimms
@@ -42,7 +42,7 @@ static const UINT8 spdAddressLookup [2] [2] [4] =  // socket, channel, dimm
 		{0x00, 0x00},	// channel 0 dimms
 		{0x00, 0x00},	// channel 1 dimms
 	},
-   };
+};
 
 /*-----------------------------------------------------------------------------
  *
@@ -50,7 +50,7 @@ static const UINT8 spdAddressLookup [2] [2] [4] =  // socket, channel, dimm
  */
 
 static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
-   {
+{
 	unsigned int status;
 	UINT64 limit;
 
@@ -64,8 +64,7 @@ static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
 
 	// time limit to avoid hanging for unexpected error status (should never happen)
 	limit = __rdtsc () + 2000000000 / 10;
-   for (;;)
+	for (;;) {
-      {
 		status = __inbyte (iobase);
 		if (__rdtsc () > limit) break;
 		if ((status & 2) == 0) continue;		// SMBusInterrupt not set, keep waiting
@@ -76,7 +75,7 @@ static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
 	buffer [0] = __inbyte (iobase + 5);
 	if (status == 2) status = 0;				// check for done with no errors
 	return status;
-   }
+}
 
 /*-----------------------------------------------------------------------------
  *
@@ -85,7 +84,7 @@ static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
  */
 
 static int readSmbusByte (int iobase, int address, char *buffer)
-   {
+{
 	unsigned int status;
 	UINT64 limit;
 
@@ -94,8 +93,7 @@ static int readSmbusByte (int iobase, int address, char *buffer)
 
 	// time limit to avoid hanging for unexpected error status
 	limit = __rdtsc () + 2000000000 / 10;
-   for (;;)
+	for (;;) {
-      {
 		status = __inbyte (iobase);
 		if (__rdtsc () > limit) break;
 		if ((status & 2) == 0) continue;		// SMBusInterrupt not set, keep waiting
@@ -106,7 +104,7 @@ static int readSmbusByte (int iobase, int address, char *buffer)
 	buffer [0] = __inbyte (iobase + 5);
 	if (status == 2) status = 0;				// check for done with no errors
 	return status;
-   }
+}
 
 /*---------------------------------------------------------------------------
  *
@@ -118,7 +116,7 @@ static int readSmbusByte (int iobase, int address, char *buffer)
  */
 
 static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
-   {
+{
 	int index, error;
 
 	/* read the first byte using offset zero */
@@ -126,14 +124,13 @@ static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
 	if (error) return error;
 
 	/* read the remaining bytes using auto-increment for speed */
-   for (index = 1; index < count; index++)
+	for (index = 1; index < count; index++) {
-      {
 		error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
 		if (error) return error;
 	}
 
 	return 0;
-   }
+}
 
 static void writePmReg (int reg, int data)
 	{
@@ -142,16 +139,16 @@ static void writePmReg (int reg, int data)
 	}
 
 static void setupFch (int ioBase)
-   {
+{
 	writePmReg (0x2D, ioBase >> 8);
 	writePmReg (0x2C, ioBase | 1);
 	writePmReg (0x29, 0x80);
 	writePmReg (0x28, 0x61);
 	__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
-   }
+}
 
 AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
-   {
+{
 	int spdAddress, ioBase;
 
 	if (info->SocketId	 >= DIMENSION (spdAddressLookup		)) return AGESA_ERROR;
@@ -163,4 +160,4 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
 	ioBase = 0xB00;
 	setupFch (ioBase);
 	return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
-   }
+}

src/mainboard/amd/persimmon/get_bus_conf.c

@@ -95,7 +95,6 @@ void get_bus_conf(void)
 		bus_type[i] = 0; /* default ISA bus. */
 	}
 
-
 	bus_type[0] = 1;	/* pci */
 
 //	bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
@@ -104,8 +103,6 @@ void get_bus_conf(void)
 	/* sb800 */
 	dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
 
-
-
 	if (dev) {
 		bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
 
@@ -123,10 +120,10 @@ void get_bus_conf(void)
 			bus_isa++;
 		}
 	}
+
 	for (j = bus_sb800[2]; j < bus_isa; j++)
 		bus_type[j] = 1;
 
-
 	/* I/O APICs:	 APIC ID Version State	 Address */
 	bus_isa = 10;
 	apicid_base = CONFIG_MAX_CPUS;

src/mainboard/amd/persimmon/mainboard.c

@@ -80,8 +80,7 @@ static void persimmon_enable(device_t dev)
 	else {
 		if (sys_mem >= 0x40000000) {
 			uma_memory_size = 0x10000000;	/* >= 1G memory, 256M recommended UMA */
-	  }
+		} else {
-	  else {
 			uma_memory_size = 0x4000000;	/* <1G memory, 64M recommended UMA */
 		}
 	}

src/mainboard/amd/persimmon/romstage.c

@@ -118,4 +118,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x54);	// Should never see this post code.
 }
-