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superio/ite: Distinguish between chips for PECI readings

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Some chips can read external temperature sensor values only to TMPIN3.
These use EC register 0x55, bit 7 to enable that. This patch adds
support for this. It is called "old PECI" by lm_sensors [0].

Other chips can read to any TMPIN[1-3] which is configured in EC
register 0x51 like the other temperature sources. This was the only
supported method. This patch adds a Kconfig option to indicate this
variant.

This patch was tested on an Acer Aspire M3800 which has an IT8720F that
reads the CPU temperature via PECI. It allows the automatic fan control
feature of the Super I/O to work.

Overview of support per chip in the coreboot tree, determined from
reading the publicly available datasheets or lm_sensors, if noted:

Old PECI:
* IT8718F
* IT8720F
* IT8781F, IT8782F, IT8783E/F

Normal PECI:
* IT8721F (exception: no PECI to TMPIN2)
* IT8728F
* IT8772E (uses separate code in coreboot, not superio/ite/common)
* IT8786E
* IT8613E, IT8623E (lm_sensors)

[0] Linux kernel 5.4.48, drivers/hwmon/it87.c

Signed-off-by: Michael Büchler <michael.buechler@posteo.net>
Change-Id: Iab7115852437d46c9b1269bba61ffcf680fe5a6a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Michael Büchler
2020-06-01 20:51:58 +02:00
committed by Felix Held
parent e4031c558d
commit 370b8b6cef
8 changed files with 41 additions and 3 deletions
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1
src/superio/ite/it8786e/Kconfig
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@@ -7,3 +7,4 @@ config SUPERIO_ITE_IT8786E
select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
select SUPERIO_ITE_ENV_CTRL_8BIT_PWM
select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG
select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN