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soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device

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Port 9c348a7b7ea3 ("soc/intel/alderlake: Fix processor hang while plug
unplug of TBT device") from Alder Lake to fix a similar issue present
on Tiger Lake:

> Processor hang is observed while hot plug unplug of TBT device. BIOS
> should execute TBT PCIe RP RTD3 flow based on the value of
> TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
> BIT30 in TBT FW version is not set.

> BUG=b:194880254

> https://review.coreboot.org/c/coreboot/+/56503

Change-Id: Ie5409111d4239be86c0b153f01b4fe5fc6af352c
Signed-off-by: CoolStar <coolstarorganization@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80718
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
CoolStar 2024-02-23 12:09:22 -08:00 committed by Matt DeVillier
parent 9bbfafbef8
commit 377845a9d4
2 changed files with 10 additions and 1 deletions
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8
src/soc/intel/tigerlake/acpi/tcss.asl
View File

@ -567,6 +567,10 @@ Scope (\_SB.PCI0)
/* DMA0 is not in D3Cold now. */ /* DMA0 is not in D3Cold now. */
\_SB.PCI0.TDM0.D3CE() /* Enable DMA RTD3 */ \_SB.PCI0.TDM0.D3CE() /* Enable DMA RTD3 */
If (\_SB.PCI0.TDM0.IF30 != 1) {
Return
}
Printf("Push TBT RPs to D3Cold together") Printf("Push TBT RPs to D3Cold together")
If (\_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) { If (\_SB.PCI0.TRP0.VDID != 0xFFFFFFFF) {
/* Put RP0 to D3 cold. */ /* Put RP0 to D3 cold. */
@ -622,6 +626,10 @@ Scope (\_SB.PCI0)
/* DMA1 is not in D3Cold now */ /* DMA1 is not in D3Cold now */
\_SB.PCI0.TDM1.D3CE() /* Enable DMA RTD3. */ \_SB.PCI0.TDM1.D3CE() /* Enable DMA RTD3. */
If (\_SB.PCI0.TDM0.IF30 != 1) {
Return
}
Printf("Push TBT RPs to D3Cold together") Printf("Push TBT RPs to D3Cold together")
If (\_SB.PCI0.TRP2.VDID != 0xFFFFFFFF) { If (\_SB.PCI0.TRP2.VDID != 0xFFFFFFFF) {
/* Put RP2 to D3 cold. */ /* Put RP2 to D3 cold. */

3
src/soc/intel/tigerlake/acpi/tcss_dma.asl
View File

@ -11,7 +11,8 @@ Field (DPME, AnyAcc, NoLock, Preserve)
, 6, , 6,
PMES, 1, /* 15, PME_STATUS */ PMES, 1, /* 15, PME_STATUS */
Offset(0xC8), /* 0xC8, TBT NVM FW Revision */ Offset(0xC8), /* 0xC8, TBT NVM FW Revision */
, 31, , 30,
IF30, 1, /* ITBT FW Version Bit30 */
INFR, 1, /* TBT NVM FW Ready */ INFR, 1, /* TBT NVM FW Ready */
Offset(0xEC), /* 0xEC, TBT TO PCIE Register */ Offset(0xEC), /* 0xEC, TBT TO PCIE Register */
TB2P, 32, /* TBT to PCIe */ TB2P, 32, /* TBT to PCIe */