From 38170736e900a9110841447328e90348a99e19b2 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Mon, 19 Feb 2024 21:04:35 +0000 Subject: [PATCH] mb/starlabs/labtop/cml: Increase TCC Offset These values were configured based on a default value of 110, but for CML, it's actually 100. Adjust it accordingly. Change-Id: Ibffeeab67a7277625db9bdedca36d759ff0e72f6 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/81414 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/mainboard/starlabs/starbook/variants/cml/devtree.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/starlabs/starbook/variants/cml/devtree.c b/src/mainboard/starlabs/starbook/variants/cml/devtree.c index 6985c67d16..95a5d44ea3 100644 --- a/src/mainboard/starlabs/starbook/variants/cml/devtree.c +++ b/src/mainboard/starlabs/starbook/variants/cml/devtree.c @@ -22,17 +22,17 @@ void devtree_update(void) disable_turbo(); soc_conf->tdp_pl1_override = 15; soc_conf->tdp_pl2_override = 15; - cfg->tcc_offset = 30; + cfg->tcc_offset = 20; break; case PP_BALANCED: soc_conf->tdp_pl1_override = 17; soc_conf->tdp_pl2_override = 20; - cfg->tcc_offset = 25; + cfg->tcc_offset = 15; break; case PP_PERFORMANCE: soc_conf->tdp_pl1_override = 20; soc_conf->tdp_pl2_override = 25; - cfg->tcc_offset = 20; + cfg->tcc_offset = 10; break; }