From 38a05534478febdca113701ac0867bcc7412a52f Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Tue, 3 Jan 2023 15:26:02 -0700 Subject: [PATCH] mb/system76/adl-p: oryp10: Remove RTD3 configs Change-Id: I009a57c7af371e3e073fc1190526356fe8300d8e Signed-off-by: Tim Crawford --- .../adl/variants/oryp10/overridetree.cb | 20 ------------------- 1 file changed, 20 deletions(-) diff --git a/src/mainboard/system76/adl/variants/oryp10/overridetree.cb b/src/mainboard/system76/adl/variants/oryp10/overridetree.cb index 44e388be90..817e13edff 100644 --- a/src/mainboard/system76/adl/variants/oryp10/overridetree.cb +++ b/src/mainboard/system76/adl/variants/oryp10/overridetree.cb @@ -150,12 +150,6 @@ chip soc/intel/alderlake .clk_req = 2, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" # PCH_WLAN_EN - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# - register "srcclk_pin" = "2" # WLAN_CLKREQ# - device generic 0 on end - end end device ref pcie_rp6 on # PCIe RP#6 x1, Clock 6 (CARD) @@ -164,12 +158,6 @@ chip soc/intel/alderlake .clk_req = 6, .flags = PCIE_RP_HOTPLUG | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - # XXX: Enable connected directly to 3.3VS? - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# - register "srcclk_pin" = "6" # CARD_CLKREQ# - device generic 0 on end - end end device ref pcie_rp8 on # PCIe RP#8 x1, Clock 5 (GLAN) @@ -178,15 +166,7 @@ chip soc/intel/alderlake .clk_req = 5, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - # XXX: Enable connected directly to VDD3? - #register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D4)" # GPIO_LAN_EN - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# - register "srcclk_pin" = "5" # GLAN_CLKREQ# - device generic 0 on end - end end - device ref pmc hidden chip drivers/intel/pmc_mux device generic 0 on