AGESA f15tn f16kb: Fix ACPI S3 resume for FCH
This recovers FCH configuration on S3 resume path. Appearst to work, but other defects of HAVE_ACPI_RESUME must be fixed also before S3 support is re-enabled. Change-Id: I8d07d2e9dc161b67d854fcc8ec1da1f36900f989 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -330,6 +330,7 @@ static void amd_bs_ramstage_init(void *arg)
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if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT))
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if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT))
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cbmem_initialize();
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cbmem_initialize();
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agesa_execute_state(cb, AMD_S3LATE_RESTORE);
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agesa_execute_state(cb, AMD_S3LATE_RESTORE);
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fchs3earlyrestore(&cb->StdHeader);
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}
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}
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}
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}
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@ -351,8 +352,10 @@ static void amd_bs_post_device(void *arg)
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{
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{
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struct sysinfo *cb = arg;
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struct sysinfo *cb = arg;
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if (acpi_is_wakeup_s3())
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if (acpi_is_wakeup_s3()) {
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fchs3laterestore(&cb->StdHeader);
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return;
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return;
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}
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agesa_execute_state(cb, AMD_INIT_LATE);
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agesa_execute_state(cb, AMD_INIT_LATE);
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@ -386,3 +389,15 @@ void __attribute__((weak))
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board_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env) { }
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board_BeforeInitEnv(struct sysinfo *cb, AMD_ENV_PARAMS *Env) { }
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void __attribute__((weak))
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void __attribute__((weak))
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board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid) { }
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board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid) { }
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AGESA_STATUS __attribute__((weak))
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fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader)
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{
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return AGESA_SUCCESS;
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}
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AGESA_STATUS __attribute__((weak))
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fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader)
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{
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return AGESA_SUCCESS;
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}
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@ -38,6 +38,10 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock);
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AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock);
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AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock);
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#endif
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#endif
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/* For FCH */
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AGESA_STATUS fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader);
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AGESA_STATUS fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader);
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struct sysinfo
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struct sysinfo
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{
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{
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AMD_CONFIG_PARAMS StdHeader;
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AMD_CONFIG_PARAMS StdHeader;
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@ -80,7 +80,6 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
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#else
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#else
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void hudson_enable(device_t dev);
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void hudson_enable(device_t dev);
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void s3_resume_init_data(void *FchParams);
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#endif /* __PRE_RAM__ */
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#endif /* __PRE_RAM__ */
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#endif /* __SMM__ */
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#endif /* __SMM__ */
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@ -20,6 +20,8 @@
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#include "hudson.h"
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#include "hudson.h"
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#include "AGESA.h"
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#include "AGESA.h"
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#include <northbridge/amd/agesa/state_machine.h>
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extern FCH_DATA_BLOCK InitEnvCfgDefault;
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extern FCH_DATA_BLOCK InitEnvCfgDefault;
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extern FCH_INTERFACE FchInterfaceDefault;
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extern FCH_INTERFACE FchInterfaceDefault;
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extern FCH_RESET_DATA_BLOCK InitResetCfgDefault;
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extern FCH_RESET_DATA_BLOCK InitResetCfgDefault;
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@ -27,13 +29,9 @@ extern FCH_RESET_INTERFACE FchResetInterfaceDefault;
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#define DUMP_FCH_SETTING 0
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#define DUMP_FCH_SETTING 0
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void s3_resume_init_data(void *data)
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static void s3_resume_init_data(FCH_DATA_BLOCK *FchParams)
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{
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{
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FCH_DATA_BLOCK *FchParams = (FCH_DATA_BLOCK *)data;
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AMD_CONFIG_PARAMS *StdHeader = FchParams->StdHeader;
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*FchParams = InitEnvCfgDefault;
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*FchParams = InitEnvCfgDefault;
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FchParams->StdHeader = StdHeader;
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FchParams->Usb.Xhci0Enable = InitResetCfgDefault.FchReset.Xhci0Enable;
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FchParams->Usb.Xhci0Enable = InitResetCfgDefault.FchReset.Xhci0Enable;
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FchParams->Usb.Xhci1Enable = InitResetCfgDefault.FchReset.Xhci1Enable;
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FchParams->Usb.Xhci1Enable = InitResetCfgDefault.FchReset.Xhci1Enable;
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@ -120,3 +118,28 @@ void s3_resume_init_data(void *data)
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}
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}
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#endif
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#endif
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}
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}
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AGESA_STATUS fchs3earlyrestore(AMD_CONFIG_PARAMS *StdHeader)
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{
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FCH_DATA_BLOCK FchParams;
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/* FIXME: Recover FCH_DATA_BLOCK from CBMEM. */
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s3_resume_init_data(&FchParams);
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FchParams.StdHeader = StdHeader;
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FchInitS3EarlyRestore(&FchParams);
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return AGESA_SUCCESS;
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}
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AGESA_STATUS fchs3laterestore(AMD_CONFIG_PARAMS *StdHeader)
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{
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FCH_DATA_BLOCK FchParams;
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/* FIXME: Recover FCH_DATA_BLOCK from CBMEM. */
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s3_resume_init_data(&FchParams);
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FchParams.StdHeader = StdHeader;
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FchInitS3LateRestore(&FchParams);
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return AGESA_SUCCESS;
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}
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