payloads/tianocore: Rename TianoCore to edk2

coreboot uses TianoCore interchangeably with EDK II, and whilst the
meaning is generally clear, it's not the payload it uses. EDK II is
commonly written as edk2.

coreboot builds edk2 directly from the edk2 repository. Whilst it
can build some components from edk2-platforms, the target is still
edk2.

[1] tianocore.org - "Welcome to TianoCore, the community supporting"
[2] tianocore.org - "EDK II is a modern, feature-rich, cross-platform
firmware development environment for the UEFI and UEFI Platform
Initialization (PI) specifications."

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4de125d92ae38ff8dfd0c4c06806c2d2921945ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65820
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Sean Rhodes
2022-07-13 10:11:44 +01:00
committed by Martin L Roth
parent 8f7f4bf87a
commit 38c99b5659
44 changed files with 173 additions and 176 deletions

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@@ -278,7 +278,7 @@ Spec](https://uefi.org/specifications) for details, or run the tool
* ECC - [**Error Correction Code**](https://en.wikipedia.org/wiki/Error_correction_code) - Typically used to refer to a type of
memory that can detect and correct memory errors.
* EDID - [**Extended Display Identification Data**](https://en.wikipedia.org/wiki/Extended_Display_Identification_Data)
* EDK2 - EFI Development Kit 2
* edk2 - EFI Development Kit 2
* EDO - Memory: [**Extended Data
Out**](https://en.wikipedia.org/wiki/Dynamic_random-access_memory#Extended_data_out_DRAM)
- A DRAM standard introduced in 1994 that improved upon, but was

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@@ -87,7 +87,7 @@ across architectures.
## Port payloads to ARM, AArch64 or RISC-V
While we have a rather big set of payloads for x86 based platforms, all other
architectures are rather limited. Improve the situation by porting a payload
to one of the platforms, for example GRUB2, U-Boot (the UI part), Tianocore,
to one of the platforms, for example GRUB2, U-Boot (the UI part), edk2,
yabits, FILO, or Linux-as-Payload.
Since this is a bit of a catch-all idea, an application to GSoC should pick a

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@@ -37,15 +37,15 @@ firmware binaries on [GitHub](https://pcengines.github.io).
[Star Labs](https://starlabs.systems/) offers a range of laptops designed and
built specifically for Linux that are available with coreboot firmware. They
use Tianocore as the payload and include an NVRAM option to disable the
Intel Management Engine.
use edk2 as the payload and include an NVRAM option to disable the Intel
Management Engine.
### System76
[System76](https://system76.com/) manufactures Linux laptops, desktops, and
servers. Some models are sold with [System76 Open
Firmware](https://github.com/system76/firmware-open), an open source
distribution of coreboot, EDK2, and System76 firmware applications.
distribution of coreboot, edk2, and System76 firmware applications.
### Purism
@@ -76,7 +76,7 @@ trustworthiness for all.
[MrChromebox](https://mrchromebox.tech/) provides upstream coreboot firmware
images for the vast majority of x86-based Chromebooks and Chromeboxes, using
Tianocore as the payload to provide a modern UEFI bootloader. Why replace
edk2 as the payload to provide a modern UEFI bootloader. Why replace
coreboot with coreboot? Mr Chromebox's images are built using upstream
coreboot (vs Google's older, static tree/branch), include many features and
fixes not found in the stock firmware, and offer much broader OS compatibility

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@@ -21,7 +21,7 @@ operations is desired, as it reduces complexity and potential for bugs.
This can be used by a FTW (FaultTolerantWrite) implementation that uses
at least two regions in an A/B update scheme. The FTW implementation in
EDK2 uses three different regions in the store:
edk2 uses three different regions in the store:
- The variable store
- The FTW spare block
@@ -35,7 +35,7 @@ With 64 KiB as block size, the minimum size of the FTW-enabled store is:
- The FTW spare block: 2 blocks = 2 * 64 KiB
- The FTW working block: 1 block = 64 KiB
Therefore, the minimum size for EDK2 FTW is 4 blocks, or 256 KiB.
Therefore, the minimum size for edk2 FTW is 4 blocks, or 256 KiB.
## API

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@@ -26,7 +26,7 @@ initialization routines across many different use cases, no matter if
they provide standard interfaces or entirely custom boot flows.
Popular [payloads](payloads.md) in use with coreboot are SeaBIOS,
which provides PCBIOS services, Tianocore, which provides UEFI services,
which provides PCBIOS services, edk2, which provides UEFI services,
GRUB2, the bootloader used by many Linux distributions, or depthcharge,
a custom boot loader used on Chromebooks.

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@@ -37,7 +37,7 @@ easy to remove and reflash.
## Working
- PS/2 keyboard with SeaBIOS & Tianocore (in Mint 18.3/19.1)
- PS/2 keyboard with SeaBIOS & edk2 (in Mint 18.3/19.1)
- Rear/front headphones connector audio & mic
@@ -57,7 +57,7 @@ easy to remove and reflash.
port 3 port 5 port 1 port 8
port 4 port 6 port 2 port 7
- NVME SSD boot on PCIe-x16/x8/4x slot using Tianocore
- NVME SSD boot on PCIe-x16/x8/4x slot using edk2
(tested with M.2-to-PCIe adapter and a M.2 Samsung EVO 970 SSD)
- CPU Temp sensors (tested PSensor on linux + HWINFO64 on Win10)
@@ -89,7 +89,7 @@ easy to remove and reflash.
- If you use the MRC.bin, the NVRAM variable gfx_uma_size may be ignored
as IGP's UMA could be reconfigured by the blob
- Using TianoCore + a PCIe GPU under Windows crashes with an
- Using edk2 + a PCIe GPU under Windows crashes with an
ACPI_BIOS_ERROR fatal code, not sure why. Using just the IGP
works perfectly
@@ -105,9 +105,9 @@ easy to remove and reflash.
## Not working
- PS/2 keyboard in Win10 using Tianocore (please see [Known issues])
- PS/2 mouse using Tianocore
- PCIe graphics card on Windows and Tianocore (throws critical ACPI_BIOS_ERROR)
- PS/2 keyboard in Win10 using edk2 (please see [Known issues])
- PS/2 mouse using edk2
- PCIe graphics card on Windows and edk2 (throws critical ACPI_BIOS_ERROR)
## Native raminit compatibility

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@@ -104,11 +104,11 @@ solution. Wires need to be connected to be able to flash using an external progr
- SMBus
- Initialization with FSP
- SeaBIOS payload (commit a5cab58e9a3fb6e168aba919c5669bea406573b4)
- TianoCore payload (commit 860a8d95c2ee89c9916d6e11230f246afa1cd629)
- edk2 payload (commit 860a8d95c2ee89c9916d6e11230f246afa1cd629)
- LinuxBoot (kernel kernel-4_19_97) (uroot commit 9c9db9dbd6b532f5f91a511a0de885c6562aadd7)
- eMMC
All of the above has been briefly tested by booting Linux from eMMC using the TianoCore payload
All of the above has been briefly tested by booting Linux from eMMC using the edk2 payload
and LinuxBoot.
SeaBios has been checked to the extend that it runs to the boot selection and provides display

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@@ -130,7 +130,7 @@ The board can be debugged with EHCI debug. The EHCI debug port is the USB port o
- Arch Linux with Linux 5.8.9
- Memory initialization with mrc.bin version 1.6.1 Build 2
- Graphics initialization with libgfxinit
- Payload: SeaBIOS, Tianocore
- Payload: SeaBIOS, edk2
- EC firmware
- KBC Revision 92.15 from OEM firmware version 01.33
- KBC Revision 92.17 from OEM firmware version 01.50

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@@ -45,7 +45,7 @@ make
```
## Payloads
- SeaBIOS
- Tianocore
- edk2
- Linux as payload
## Flashing coreboot

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@@ -92,7 +92,7 @@ located underneath the Wi-Fi module, below the left cooling fan.
* Internal display with libgfxinit, VGA option ROM, or FSP/GOP init
* External displays via HDMI, USB-C Alt-Mode
* SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), and Heads payloads
* SeaBIOS (1.14), edk2 (CorebootPayloadPkg), and Heads payloads
* Ethernet, m.2 2230 Wi-Fi
* System firmware updates via flashrom
* M.2 storage (NVMe, SATA III)

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@@ -107,7 +107,7 @@ desoldering it from the mainboard.
* External displays via HDMI/DisplayPort with VGA option ROM or FSP/GOP init
(no libgfxinit support yet)
* SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), Heads (Purism downstream) payloads
* SeaBIOS (1.14), edk2 (CorebootPayloadPkg), Heads (Purism downstream) payloads
* Ethernet, m.2 2230 Wi-Fi
* System firmware updates via flashrom
* PCIe NVMe

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@@ -23,13 +23,11 @@ When chainloaded from GRUB2, the following menuentry could be used:
module /vgaroms/seavgabios.bin
}
## Tianocore
## edk2
[Tianocore](https://www.tianocore.org) is the open source reference
implementation of the UEFI Specifications that modern firmware for PCs is
based on. There were various projects in the past to make it suitable as a
coreboot payload, but these days this function is available directly in the
UefiPayloadPkg part of its source tree.
[edk2](https://github.com/tianocore/tianocore.github.io/wiki/Getting-Started-with-EDK-II) is an open-source modern, feature-rich,
cross-platform firmware development environment for the UEFI and UEFI
Platform Initialization (PI) specifications.
## GRUB2

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@@ -52,9 +52,9 @@ Deprecations and incompatible changes
Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's
updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier
to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig
to build from upstream edk2 master. Drop the EDK2_USE_8254_TIMER Kconfig
option since it applies only to CorebootPayloadPkg. Clean up the Makefile now
that we're only building from a single Tianocore package/target.
that we're only building from a single edk2 package/target.
### Remove old lp4x and ddr4 versions of spd_tools

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@@ -55,15 +55,15 @@ is here: https://github.com/siro20/coreboot/tree/cbui/payloads/cbui
### UEFI support: A long road to go
coreboot can be used with the Tianocore EDK2 UEFI implementation which
coreboot can be used with the edk2 UEFI implementation which
is open source and available at Github. Sadly it is not currently
integrated into the coreboot build. This has several reasons:
* EDK2 only supports GCC 4.8 profile. coreboot is now running on GCC 6.3.0.
* Incompatibilities with code inside the EDK2 which has not been updated.
* edk2 only supports GCC 4.8 profile. coreboot is now running on GCC 6.3.0.
* Incompatibilities with code inside the edk2 which has not been updated.
We started to make progress with the integration into our sources and
the hope is that by the end of the summer, we finally support the EDK2
the hope is that by the end of the summer, we finally support the edk2
payload out-of-the- box. See the current patch state at
http://review.coreboot.org/#/c/15057/

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@@ -84,7 +84,7 @@ General changes
* Integrate me_cleaner
* Add flashconsole implementation
* Build Tianocore UEFI payload from upstream source
* Build edk2 UEFI payload from upstream source
* Remove CMOS NVRAM configurable baud rates
* A common mrc_cache driver to store romstage settings in SPI flash

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@@ -71,7 +71,7 @@ detection
Payloads
--------
* Bumped SeaBIOS to 1.11.1
* Improved TianoCore integration
* Improved edk2 integration
Security
--------