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src/[arch-lib]: change "unsigned" to "unsigned int"

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Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ibb7b48a7a144421aff29acbb7ac30968ae5fe5ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36329
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Martin Roth
2019-10-23 21:41:00 -06:00
committed by Martin Roth
parent e74ca4ffc2
commit 38ddbfb325
37 changed files with 157 additions and 157 deletions
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16
src/device/pciexp_device.c
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@@ -45,7 +45,7 @@ unsigned int pciexp_find_extended_cap(struct device *dev, unsigned int cap)
* Re-train a PCIe link
*/
#define PCIE_TRAIN_RETRY 10000
static int pciexp_retrain_link(struct device *dev, unsigned cap)
static int pciexp_retrain_link(struct device *dev, unsigned int cap)
{
unsigned int try;
u16 lnk;
@@ -90,8 +90,8 @@ static int pciexp_retrain_link(struct device *dev, unsigned cap)
* and enable Common Clock Configuration if possible. If CCC is
* enabled the link must be retrained.
*/
static void pciexp_enable_common_clock(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap)
static void pciexp_enable_common_clock(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap)
{
u16 root_scc, endp_scc, lnkctl;
@@ -122,7 +122,7 @@ static void pciexp_enable_common_clock(struct device *root, unsigned root_cap,
}
}
static void pciexp_enable_clock_power_pm(struct device *endp, unsigned endp_cap)
static void pciexp_enable_clock_power_pm(struct device *endp, unsigned int endp_cap)
{
/* check if per port clk req is supported in device */
u32 endp_ca;
@@ -328,8 +328,8 @@ static void pciexp_config_L1_sub_state(struct device *root, struct device *dev)
* by checking both root port and endpoint and returning
* the highest latency value.
*/
static int pciexp_aspm_latency(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap,
static int pciexp_aspm_latency(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap,
enum aspm_type type)
{
int root_lat = 0, endp_lat = 0;
@@ -364,8 +364,8 @@ static int pciexp_aspm_latency(struct device *root, unsigned root_cap,
/*
* Enable ASPM on PCIe root port and endpoint.
*/
static void pciexp_enable_aspm(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap)
static void pciexp_enable_aspm(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap)
{
const char *aspm_type_str[] = { "None", "L0s", "L1", "L0s and L1" };
enum aspm_type apmc = PCIE_ASPM_NONE;