janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Stefan Reinauer
parent
d51eddbb66
commit
38f147ed3d
@@ -78,7 +78,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
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nb_cfg_54 = read_nb_cfg_54();
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#if 0
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//it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it.
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//it is for all e0 single core and nc_cfg_54 low is set, but in the romstage.c stage we do not set that bit for it.
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if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) {
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//we need to check if e0 single core is there
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int i;
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@@ -109,7 +109,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
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if((apicid_base+ioapic_num-1)>0xf) {
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// We need to enable APIC EXT ID
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printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n");
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printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
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enable_apic_ext_id(nodes);
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}
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@@ -463,7 +463,7 @@ static void wait_all_core0_started(void)
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* start the core0 in node, so it can generate HT packet to feature code.
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*
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* This function starts the AP nodes core0s. wait_all_core0_started() in
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* cache_as_ram_auto.c waits for all the AP to be finished before continuing
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* romstage.c waits for all the AP to be finished before continuing
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* system init.
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*/
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static void start_node(u8 node)
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@@ -89,7 +89,7 @@ void setupsc520(void)
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/* as per the book: */
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/* PAR register setup */
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/* set up the PAR registers as they are on the MSM586SEG */
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/* moved to auto.c by Stepan, Ron says: */
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/* moved to romstage.c by Stepan, Ron says: */
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/* NOTE: move this to mainboard.c ASAP */
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setup_pars();
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