x86: bootblock: remove linking and program flow from build system

The build system was previously determining the flow
and linking scripts bootblock code by the order of files
added to the bootblock_inc bootblock-y variables.Those
files were then concatenated together and built by a myriad of
make rules.

Now bootblock.S and bootblock.ld is added so that bootblock
can be built and linked using the default build rules.
CHIPSET_BOOTBLOCK_INCLUDE is introduced in order to allow the
chipset code to place include files in the path of the bootblock
program -- a replacement for the chipset_bootblock_inc
make variable.

BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built vortex, rambi, and some asus boards.

Change-Id: Ida4571cbe6eed65e77ade98b8d9ad056353c53f9
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11495
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/arch/x86/Makefile.inc

@@ -67,65 +67,41 @@ CBFS_BASE_ADDRESS=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_CBFS_
 
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
 
-bootblock-srcs += $(src)/arch/x86/failover.ld
-bootblock-srcs += $(src)/cpu/x86/16bit/entry16.ld
-bootblock-srcs += $(src)/cpu/x86/16bit/reset16.ld
-bootblock-srcs += $(src)/arch/x86/id.ld
-ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
-bootblock-srcs += $(src)/cpu/intel/fit/fit.ld
-endif
+# Add the assembly file that pulls in the rest of the dependencies in
+# the right order. Make sure the auto generated bootblock.inc is a proper
+# dependency. Make the same true for the linker sript.
+bootblock-y += bootblock.S
+$(obj)/arch/x86/bootblock.bootblock.o: $(objgenerated)/bootblock.inc
 
-# TODO: Why can't this use the real bootblock-y += xxx.S mechanism instead?
-bootblock_inc = $(src)/arch/x86/prologue.inc
-bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
-bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
-bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
-bootblock_inc += $(src)/arch/x86/id.inc
-ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
-bootblock_inc += $(src)/cpu/intel/fit/fit.inc
-endif
-bootblock_inc += $(chipset_bootblock_inc)
-
-ifeq ($(CONFIG_SSE),y)
-bootblock_inc += $(src)/cpu/x86/sse_enable.inc
-endif
-bootblock_inc += $(objgenerated)/bootblock.inc
-bootblock_inc += $(src)/arch/x86/walkcbfs.S
+bootblock-y += bootblock.ld
+$(obj)/arch/x86/bootblock.bootblock.ld: $(objgenerated)/bootblock.ld
 
 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ -D__BOOTBLOCK__
 ifeq ($(CONFIG_SSE),y)
 bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__ -D__BOOTBLOCK__
 endif
 
-$(objgenerated)/bootblock.ld: $$(filter %.ld,$$(bootblock-objs))
+# This is a hack in case there are no per chipset linker files.
+$(objgenerated)/empty:
+	touch $@
+
+$(objgenerated)/bootblock.ld: $$(filter-out $(obj)/arch/x86/bootblock.bootblock.ld, $$(filter %.ld,$$(bootblock-objs))) $(objgenerated)/empty
 	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
 	cat $^ >> $@.tmp
 	mv $@.tmp $@
 
-$(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
-	@printf "    GEN        $(subst $(obj)/,,$(@))\n"
-	printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
-
-$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_bootblock) $(CFLAGS_bootblock) -c -o $@ $<  > $(basename $@).disasm
-
-$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
-
 $(objgenerated)/bootblock.inc: $(src)/arch/x86/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(KCONFIG_AUTOHEADER)
 	@printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
 	$(CC_bootblock) $(CPPFLAGS_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
 		$< > $(objgenerated)/bootblock.inc.d
 	$(ROMCC) -c -S $(bootblock_romccflags) -I. $(CPPFLAGS_bootblock) $< -o $@
 
-$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
+$(objcbfs)/bootblock.debug: $(obj)/arch/x86/bootblock.bootblock.o $(obj)/arch/x86/bootblock.bootblock.ld
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
-	$(LD_bootblock) -m elf_i386 --oformat elf32-i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld
+	$(LD_bootblock) -m elf_i386 --oformat elf32-i386 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld
 else
-	$(LD_bootblock) -m elf_x86_64 --oformat elf64-x86-64 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld
+	$(LD_bootblock) -m elf_x86_64 --oformat elf64-x86-64 -static -o $@ -L$(obj) $< -T $(obj)/arch/x86/bootblock.bootblock.ld
 endif
 
 

src/arch/x86/bootblock.S

@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/* This file assembles the bootblock program by the order of the includes. Thus,
+ * it's extremely important that one pays very careful attention to the order
+ * of the includes. */
+
+#include <arch/x86/prologue.inc>
+#include <cpu/x86/16bit/entry16.inc>
+#include <cpu/x86/16bit/reset16.inc>
+#include <cpu/x86/32bit/entry32.inc>
+#include <arch/x86/id.inc>
+
+#if IS_ENABLED(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
+#include <cpu/intel/fit/fit.inc>
+#endif
+
+#ifdef CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
+#include CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
+#endif
+
+#if IS_ENABLED(CONFIG_SSE)
+#include <cpu/x86/sse_enable.inc>
+#endif
+
+/*
+ * This bootblock.inc file is generated by ROMCC. The above program flow
+ * falls through to this point. ROMCC assumes the last function it parsed
+ * is the main function and it places its instructions at the beginning of
+ * the generated file. Moreover, any library/common code needed in bootblock
+ * needs to come after bootblock.inc.
+ */
+#include <generated/bootblock.inc>
+
+#include <arch/x86/walkcbfs.S>

src/arch/x86/bootblock.ld

@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <arch/x86/failover.ld>
+#include <cpu/x86/16bit/entry16.ld>
+#include <cpu/x86/16bit/reset16.ld>
+#include <arch/x86/id.ld>
+#if IS_ENABLED(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
+#include <cpu/intel/fit/fit.ld>
+#endif
+
+/* Include generated .ld files. */
+#include <generated/bootblock.ld>

src/arch/x86/id.inc

@@ -1,3 +1,5 @@
+#include <build.h>
+
 	.section ".id", "a", @progbits
 
 	.globl __id_start