intel/strago: Clean up DDR configuration.

This change includes following changes:
- Clean up the DDR configuration and flow.
- Removing support for non LPDDR3 boards.
- Supporting only LPDDR3 and PMIC config.

TEST=Build/flash CB and boot the platform to OS.

Change-Id: I8369443da728a4c07e0c1a82040d94034c3542da
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/297941
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Jenny Tc <jenny.tc@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/13122
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/intel/strago/Kconfig

@@ -21,12 +21,6 @@ config CHROMEOS
 	select VBOOT_DYNAMIC_WORK_BUFFER
 	select VIRTUAL_DEV_SWITCH
 
-config DISPLAY_SPD_DATA
-	bool "Display Memory Serial Presence Detect Data"
-	default n
-	help
-	  When enabled displays the memory configuration data.
-
 config DYNAMIC_VNN_SUPPORT
 	bool "Enables support for Dynamic VNN"
 	default n