Add support to run SMM handler in TSEG instead of ASEG
Traditionally coreboot's SMM handler runs in ASEG (0xa0000), "behind" the graphics memory. This approach has two issues: - It limits the possible size of the SMM handler (and the number of CPUs supported in a system) - It's not considered a supported path anymore in newer CPUs. Change-Id: I9f2877e46873ab2ea8f1157ead4bc644a50be19e Signed-off-by: Duncan Laurie <dlaurie@google.com> Acked-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/842 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)
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Peter Stuge
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3aa067f595
@@ -62,6 +62,11 @@ endif
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smm-c-ccopts:=-D__SMM__
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smm-S-ccopts:=-D__SMM__
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# SMM TSEG base is dynamic
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ifeq ($(CONFIG_SMM_TSEG),y)
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smm-c-ccopts += -fpic
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endif
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ramstage-c-deps:=$$(OPTION_TABLE_H)
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romstage-c-deps:=$$(OPTION_TABLE_H)
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