sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/apollolake/lpc: Allow configuring SERIRQ via devicetree

Browse Source 
Every other SOC uses a CONFIG_* flag to enable or disable SERIRQ
continuous mode. Why they do that is beyond me, but the way we
implement it on apollolake is via devicetree.

Change-Id: I6e05758e5e264c6b0015467dd25add3bffe2b040
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14586
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Alexandru Gagniuc
2016-04-04 10:47:49 -07:00
committed by Martin Roth
parent 665fca156c
commit 3aa34a8167
2 changed files with 34 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/intel/apollolake/chip.h
View File

@@ -20,6 +20,13 @@
#define CLKREQ_DISABLED 0xf
/* Serial IRQ control. SERIRQ_QUIET is the default (0). */
enum serirq_mode {
SERIRQ_QUIET,
SERIRQ_CONTINUOUS,
SERIRQ_OFF,
};
struct soc_intel_apollolake_config {
/*
* Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has
@@ -32,6 +39,9 @@ struct soc_intel_apollolake_config {
uint8_t pcie_rp3_clkreq_pin;
uint8_t pcie_rp4_clkreq_pin;
uint8_t pcie_rp5_clkreq_pin;
/* Configure serial IRQ (SERIRQ) line. */
enum serirq_mode serirq_mode;
};
#endif /* _SOC_APOLLOLAKE_CHIP_H_ */