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FreeBSD definitions of (read|write)[bwl] collide with our own. Before we

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attempt trickery, we can simply rename the accessor functions.

Patch created with the help of Coccinelle.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
2009-03-06 22:26:00 +00:00
parent 45cc550c3a
commit 3b1a955cce
17 changed files with 348 additions and 348 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
util/flashrom/82802ab.c
View File

@ -49,23 +49,23 @@ int probe_82802ab(struct flashchip *flash)
uint8_t id1, id2; uint8_t id1, id2;
#if 0 #if 0
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
#endif #endif
writeb(0xff, bios); chip_writeb(0xff, bios);
myusec_delay(10); myusec_delay(10);
writeb(0x90, bios); chip_writeb(0x90, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
/* Leave ID mode */ /* Leave ID mode */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
@ -84,25 +84,25 @@ uint8_t wait_82802ab(volatile uint8_t *bios)
uint8_t status; uint8_t status;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0x70, bios); chip_writeb(0x70, bios);
if ((readb(bios) & 0x80) == 0) { // it's busy if ((chip_readb(bios) & 0x80) == 0) { // it's busy
while ((readb(bios) & 0x80) == 0) ; while ((chip_readb(bios) & 0x80) == 0) ;
} }
status = readb(bios); status = chip_readb(bios);
// put another command to get out of status register mode // put another command to get out of status register mode
writeb(0x90, bios); chip_writeb(0x90, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
// this is needed to jam it out of "read id" mode // this is needed to jam it out of "read id" mode
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
return status; return status;
} }
@ -115,23 +115,23 @@ int erase_82802ab_block(struct flashchip *flash, int offset)
uint8_t status; uint8_t status;
// clear status register // clear status register
writeb(0x50, bios); chip_writeb(0x50, bios);
//printf("Erase at %p\n", bios); //printf("Erase at %p\n", bios);
// clear write protect // clear write protect
//printf("write protect is at %p\n", (wrprotect)); //printf("write protect is at %p\n", (wrprotect));
//printf("write protect is 0x%x\n", *(wrprotect)); //printf("write protect is 0x%x\n", *(wrprotect));
writeb(0, wrprotect); chip_writeb(0, wrprotect);
//printf("write protect is 0x%x\n", *(wrprotect)); //printf("write protect is 0x%x\n", *(wrprotect));
// now start it // now start it
writeb(0x20, bios); chip_writeb(0x20, bios);
writeb(0xd0, bios); chip_writeb(0xd0, bios);
myusec_delay(10); myusec_delay(10);
// now let's see what the register is // now let's see what the register is
status = wait_82802ab(flash->virtual_memory); status = wait_82802ab(flash->virtual_memory);
//print_82802ab_status(status); //print_82802ab_status(status);
for (j = 0; j < flash->page_size; j++) { for (j = 0; j < flash->page_size; j++) {
if (readb(bios + j) != 0xFF) { if (chip_readb(bios + j) != 0xFF) {
printf("BLOCK ERASE failed at 0x%x\n", offset); printf("BLOCK ERASE failed at 0x%x\n", offset);
return -1; return -1;
} }
@ -162,8 +162,8 @@ void write_page_82802ab(volatile uint8_t *bios, uint8_t *src,
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
/* transfer data from source to destination */ /* transfer data from source to destination */
writeb(0x40, dst); chip_writeb(0x40, dst);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
wait_82802ab(bios); wait_82802ab(bios);
} }
} }

44
util/flashrom/am29f040b.c
View File

@ -25,12 +25,12 @@
static __inline__ int erase_sector_29f040b(volatile uint8_t *bios, static __inline__ int erase_sector_29f040b(volatile uint8_t *bios,
unsigned long address) unsigned long address)
{ {
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x80, bios + 0x555); chip_writeb(0x80, bios + 0x555);
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x30, bios + address); chip_writeb(0x30, bios + address);
sleep(2); sleep(2);
@ -52,10 +52,10 @@ static __inline__ int write_sector_29f040b(volatile uint8_t *bios,
printf("0x%08lx", (unsigned long)dst - printf("0x%08lx", (unsigned long)dst -
(unsigned long)bios); (unsigned long)bios);
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0xA0, bios + 0x555); chip_writeb(0xA0, bios + 0x555);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -72,14 +72,14 @@ int probe_29f040b(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x90, bios + 0x555); chip_writeb(0x90, bios + 0x555);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
writeb(0xF0, bios); chip_writeb(0xF0, bios);
myusec_delay(10); myusec_delay(10);
@ -94,12 +94,12 @@ int erase_29f040b(struct flashchip *flash)
{ {
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x80, bios + 0x555); chip_writeb(0x80, bios + 0x555);
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x10, bios + 0x555); chip_writeb(0x10, bios + 0x555);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);

40
util/flashrom/en29f002a.c
View File

@ -35,19 +35,19 @@ int probe_en29f512(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x90, bios + 0x555); chip_writeb(0x90, bios + 0x555);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios + 0x100); id1 = chip_readb(bios + 0x100);
id2 = readb(bios + 0x101); id2 = chip_readb(bios + 0x101);
/* exit by writing F0 anywhere? or the code below */ /* exit by writing F0 anywhere? or the code below */
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0xF0, bios + 0x555); chip_writeb(0xF0, bios + 0x555);
printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
@ -68,19 +68,19 @@ int probe_en29f002a(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0xAAA); chip_writeb(0x55, bios + 0xAAA);
writeb(0x90, bios + 0x555); chip_writeb(0x90, bios + 0x555);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios + 0x100); id1 = chip_readb(bios + 0x100);
id2 = readb(bios + 0x101); id2 = chip_readb(bios + 0x101);
/* exit by writing F0 anywhere? or the code below */ /* exit by writing F0 anywhere? or the code below */
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0xAAA); chip_writeb(0x55, bios + 0xAAA);
writeb(0xF0, bios + 0x555); chip_writeb(0xF0, bios + 0x555);
printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
@ -107,10 +107,10 @@ int write_en29f002a(struct flashchip *flash, uint8_t *buf)
/* write to the sector */ /* write to the sector */
if ((i & 0xfff) == 0) if ((i & 0xfff) == 0)
printf("address: 0x%08lx", (unsigned long)i); printf("address: 0x%08lx", (unsigned long)i);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
writeb(*buf++, dst++); chip_writeb(*buf++, dst++);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(dst); toggle_ready_jedec(dst);

12
util/flashrom/flash.h
View File

@ -58,32 +58,32 @@
#define INL inl #define INL inl
#endif #endif
static inline void writeb(uint8_t b, volatile void *addr) static inline void chip_writeb(uint8_t b, volatile void *addr)
{ {
*(volatile uint8_t *) addr = b; *(volatile uint8_t *) addr = b;
} }
static inline void writew(uint16_t b, volatile void *addr) static inline void chip_writew(uint16_t b, volatile void *addr)
{ {
*(volatile uint16_t *) addr = b; *(volatile uint16_t *) addr = b;
} }
static inline void writel(uint32_t b, volatile void *addr) static inline void chip_writel(uint32_t b, volatile void *addr)
{ {
*(volatile uint32_t *) addr = b; *(volatile uint32_t *) addr = b;
} }
static inline uint8_t readb(const volatile void *addr) static inline uint8_t chip_readb(const volatile void *addr)
{ {
return *(volatile uint8_t *) addr; return *(volatile uint8_t *) addr;
} }
static inline uint16_t readw(const volatile void *addr) static inline uint16_t chip_readw(const volatile void *addr)
{ {
return *(volatile uint16_t *) addr; return *(volatile uint16_t *) addr;
} }
static inline uint32_t readl(const volatile void *addr) static inline uint32_t chip_readl(const volatile void *addr)
{ {
return *(volatile uint32_t *) addr; return *(volatile uint32_t *) addr;
} }

100
util/flashrom/jedec.c
View File

@ -40,10 +40,10 @@ void toggle_ready_jedec(volatile uint8_t *dst)
unsigned int i = 0; unsigned int i = 0;
uint8_t tmp1, tmp2; uint8_t tmp1, tmp2;
tmp1 = readb(dst) & 0x40; tmp1 = chip_readb(dst) & 0x40;
while (i++ < 0xFFFFFFF) { while (i++ < 0xFFFFFFF) {
tmp2 = readb(dst) & 0x40; tmp2 = chip_readb(dst) & 0x40;
if (tmp1 == tmp2) { if (tmp1 == tmp2) {
break; break;
} }
@ -59,7 +59,7 @@ void data_polling_jedec(volatile uint8_t *dst, uint8_t data)
data &= 0x80; data &= 0x80;
while (i++ < 0xFFFFFFF) { while (i++ < 0xFFFFFFF) {
tmp = readb(dst) & 0x80; tmp = chip_readb(dst) & 0x80;
if (tmp == data) { if (tmp == data) {
break; break;
} }
@ -68,21 +68,21 @@ void data_polling_jedec(volatile uint8_t *dst, uint8_t data)
void unprotect_jedec(volatile uint8_t *bios) void unprotect_jedec(volatile uint8_t *bios)
{ {
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x20, bios + 0x5555); chip_writeb(0x20, bios + 0x5555);
usleep(200); usleep(200);
} }
void protect_jedec(volatile uint8_t *bios) void protect_jedec(volatile uint8_t *bios)
{ {
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
usleep(200); usleep(200);
} }
@ -94,40 +94,40 @@ int probe_jedec(struct flashchip *flash)
uint32_t largeid1, largeid2; uint32_t largeid1, largeid2;
/* Issue JEDEC Product ID Entry command */ /* Issue JEDEC Product ID Entry command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
/* Older chips may need up to 100 us to respond. The ATMEL 29C020 /* Older chips may need up to 100 us to respond. The ATMEL 29C020
* needs 10 ms according to the data sheet. * needs 10 ms according to the data sheet.
*/ */
myusec_delay(10000); myusec_delay(10000);
/* Read product ID */ /* Read product ID */
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
largeid1 = id1; largeid1 = id1;
largeid2 = id2; largeid2 = id2;
/* Check if it is a continuation ID, this should be a while loop. */ /* Check if it is a continuation ID, this should be a while loop. */
if (id1 == 0x7F) { if (id1 == 0x7F) {
largeid1 <<= 8; largeid1 <<= 8;
id1 = readb(bios + 0x100); id1 = chip_readb(bios + 0x100);
largeid1 |= id1; largeid1 |= id1;
} }
if (id2 == 0x7F) { if (id2 == 0x7F) {
largeid2 <<= 8; largeid2 <<= 8;
id2 = readb(bios + 0x101); id2 = chip_readb(bios + 0x101);
largeid2 |= id2; largeid2 |= id2;
} }
/* Issue JEDEC Product ID Exit command */ /* Issue JEDEC Product ID Exit command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(40); myusec_delay(40);
printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2);
@ -143,18 +143,18 @@ int probe_jedec(struct flashchip *flash)
int erase_sector_jedec(volatile uint8_t *bios, unsigned int page) int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
{ {
/* Issue the Sector Erase command */ /* Issue the Sector Erase command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x30, bios + page); chip_writeb(0x30, bios + page);
myusec_delay(10); myusec_delay(10);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
@ -166,18 +166,18 @@ int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
int erase_block_jedec(volatile uint8_t *bios, unsigned int block) int erase_block_jedec(volatile uint8_t *bios, unsigned int block)
{ {
/* Issue the Sector Erase command */ /* Issue the Sector Erase command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x50, bios + block); chip_writeb(0x50, bios + block);
myusec_delay(10); myusec_delay(10);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
@ -191,18 +191,18 @@ int erase_chip_jedec(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
/* Issue the JEDEC Chip Erase command */ /* Issue the JEDEC Chip Erase command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x10, bios + 0x5555); chip_writeb(0x10, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -219,15 +219,15 @@ int write_page_write_jedec(volatile uint8_t *bios, uint8_t *src,
retry: retry:
/* Issue JEDEC Data Unprotect comand */ /* Issue JEDEC Data Unprotect comand */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
/* transfer data from source to destination */ /* transfer data from source to destination */
for (i = start_index; i < page_size; i++) { for (i = start_index; i < page_size; i++) {
/* If the data is 0xFF, don't program it */ /* If the data is 0xFF, don't program it */
if (*src != 0xFF) if (*src != 0xFF)
writeb(*src, dst); chip_writeb(*src, dst);
dst++; dst++;
src++; src++;
} }
@ -238,7 +238,7 @@ retry:
src = s; src = s;
ok = 1; ok = 1;
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
if (readb(dst) != *src) { if (chip_readb(dst) != *src) {
ok = 0; ok = 0;
break; break;
} }
@ -269,15 +269,15 @@ int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
retry: retry:
/* Issue JEDEC Byte Program command */ /* Issue JEDEC Byte Program command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
/* transfer data from source to destination */ /* transfer data from source to destination */
writeb(*src, dst); chip_writeb(*src, dst);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
if (readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) { if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
goto retry; goto retry;
} }

32
util/flashrom/m29f002.c
View File

@ -22,12 +22,12 @@
int erase_m29f002(struct flashchip *flash) { int erase_m29f002(struct flashchip *flash) {
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
writeb(0xaa, bios + 0x555); chip_writeb(0xaa, bios + 0x555);
writeb(0x55, bios + 0xaaa); chip_writeb(0x55, bios + 0xaaa);
writeb(0x80, bios + 0x555); chip_writeb(0x80, bios + 0x555);
writeb(0xaa, bios + 0x555); chip_writeb(0xaa, bios + 0x555);
writeb(0x55, bios + 0xaaa); chip_writeb(0x55, bios + 0xaaa);
writeb(0x10, bios + 0x555); chip_writeb(0x10, bios + 0x555);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
return 0; return 0;
@ -35,21 +35,21 @@ int erase_m29f002(struct flashchip *flash) {
static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) { static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) {
/* erase */ /* erase */
writeb(0xaa, bios + 0x555); chip_writeb(0xaa, bios + 0x555);
writeb(0x55, bios + 0xaaa); chip_writeb(0x55, bios + 0xaaa);
writeb(0x80, bios + 0x555); chip_writeb(0x80, bios + 0x555);
writeb(0xaa, bios + 0x555); chip_writeb(0xaa, bios + 0x555);
writeb(0x55, bios + 0xaaa); chip_writeb(0x55, bios + 0xaaa);
writeb(0x30, dst); chip_writeb(0x30, dst);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
/* program */ /* program */
while (size--) { while (size--) {
writeb(0xaa, bios + 0x555); chip_writeb(0xaa, bios + 0x555);
writeb(0x55, bios + 0xaaa); chip_writeb(0x55, bios + 0xaaa);
writeb(0xa0, bios + 0x555); chip_writeb(0xa0, bios + 0x555);
writeb(*src, dst); chip_writeb(*src, dst);
toggle_ready_jedec(dst); toggle_ready_jedec(dst);
dst++; dst++;
src++; src++;

56
util/flashrom/m29f400bt.c
View File

@ -22,9 +22,9 @@
void protect_m29f400bt(volatile uint8_t *bios) void protect_m29f400bt(volatile uint8_t *bios)
{ {
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0xA0, bios + 0xAAA); chip_writeb(0xA0, bios + 0xAAA);
usleep(200); usleep(200);
} }
@ -35,18 +35,18 @@ void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
int i; int i;
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0xA0, bios + 0xAAA); chip_writeb(0xA0, bios + 0xAAA);
/* transfer data from source to destination */ /* transfer data from source to destination */
writeb(*src, dst); chip_writeb(*src, dst);
//*(volatile char *) (bios) = 0xF0; //*(volatile char *) (bios) = 0xF0;
//usleep(5); //usleep(5);
toggle_ready_jedec(dst); toggle_ready_jedec(dst);
printf printf
("Value in the flash at address %p = %#x, want %#x\n", ("Value in the flash at address %p = %#x, want %#x\n",
(uint8_t *) (dst - bios), readb(dst), *src); (uint8_t *) (dst - bios), chip_readb(dst), *src);
dst++; dst++;
src++; src++;
} }
@ -57,21 +57,21 @@ int probe_m29f400bt(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0x90, bios + 0xAAA); chip_writeb(0x90, bios + 0xAAA);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
/* The data sheet says id2 is at (bios + 0x01) and id2 listed in /* The data sheet says id2 is at (bios + 0x01) and id2 listed in
* flash.h does not match. It should be possible to use JEDEC probe. * flash.h does not match. It should be possible to use JEDEC probe.
*/ */
id2 = readb(bios + 0x02); id2 = chip_readb(bios + 0x02);
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0xF0, bios + 0xAAA); chip_writeb(0xF0, bios + 0xAAA);
myusec_delay(10); myusec_delay(10);
@ -87,13 +87,13 @@ int erase_m29f400bt(struct flashchip *flash)
{ {
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0x80, bios + 0xAAA); chip_writeb(0x80, bios + 0xAAA);
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0x10, bios + 0xAAA); chip_writeb(0x10, bios + 0xAAA);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -104,14 +104,14 @@ int erase_m29f400bt(struct flashchip *flash)
int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst) int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst)
{ {
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
writeb(0x80, bios + 0xAAA); chip_writeb(0x80, bios + 0xAAA);
writeb(0xAA, bios + 0xAAA); chip_writeb(0xAA, bios + 0xAAA);
writeb(0x55, bios + 0x555); chip_writeb(0x55, bios + 0x555);
//*(volatile uint8_t *) (bios + 0xAAA) = 0x10; //*(volatile uint8_t *) (bios + 0xAAA) = 0x10;
writeb(0x30, dst); chip_writeb(0x30, dst);
myusec_delay(10); myusec_delay(10);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);

48
util/flashrom/mx29f002.c
View File

@ -27,14 +27,14 @@ int probe_29f002(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
writeb(0xF0, bios); chip_writeb(0xF0, bios);
myusec_delay(10); myusec_delay(10);
@ -49,13 +49,13 @@ int erase_29f002(struct flashchip *flash)
{ {
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
writeb(0xF0, bios + 0x555); chip_writeb(0xF0, bios + 0x555);
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x80, bios + 0x555); chip_writeb(0x80, bios + 0x555);
writeb(0xAA, bios + 0x555); chip_writeb(0xAA, bios + 0x555);
writeb(0x55, bios + 0x2AA); chip_writeb(0x55, bios + 0x2AA);
writeb(0x10, bios + 0x555); chip_writeb(0x10, bios + 0x555);
myusec_delay(100); myusec_delay(100);
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -65,12 +65,12 @@ int erase_29f002(struct flashchip *flash)
#if 0 #if 0
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
writeb(0x30, bios + 0x0ffff); chip_writeb(0x30, bios + 0x0ffff);
writeb(0x30, bios + 0x1ffff); chip_writeb(0x30, bios + 0x1ffff);
writeb(0x30, bios + 0x2ffff); chip_writeb(0x30, bios + 0x2ffff);
writeb(0x30, bios + 0x37fff); chip_writeb(0x30, bios + 0x37fff);
writeb(0x30, bios + 0x39fff); chip_writeb(0x30, bios + 0x39fff);
writeb(0x30, bios + 0x3bfff); chip_writeb(0x30, bios + 0x3bfff);
#endif #endif
return 0; return 0;
@ -83,7 +83,7 @@ int write_29f002(struct flashchip *flash, uint8_t *buf)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
volatile uint8_t *dst = bios; volatile uint8_t *dst = bios;
writeb(0xF0, bios); chip_writeb(0xF0, bios);
myusec_delay(10); myusec_delay(10);
erase_29f002(flash); erase_29f002(flash);
//*bios = 0xF0; //*bios = 0xF0;
@ -93,10 +93,10 @@ int write_29f002(struct flashchip *flash, uint8_t *buf)
/* write to the sector */ /* write to the sector */
if ((i & 0xfff) == 0) if ((i & 0xfff) == 0)
printf("address: 0x%08lx", (unsigned long)i); printf("address: 0x%08lx", (unsigned long)i);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
writeb(*buf++, dst++); chip_writeb(*buf++, dst++);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(dst); toggle_ready_jedec(dst);

2
util/flashrom/pm49fl00x.c
View File

@ -35,7 +35,7 @@ void write_lockbits_49fl00x(volatile uint8_t *bios, int size,
if (block_size == 16384 && i % 2) if (block_size == 16384 && i % 2)
continue; continue;
writeb(bits, bios + (i * block_size) + 2); chip_writeb(bits, bios + (i * block_size) + 2);
} }
} }

58
util/flashrom/sharplhf00l04.c
View File

@ -41,23 +41,23 @@ int probe_lhf00l04(struct flashchip *flash)
#if 0 #if 0
/* Enter ID mode */ /* Enter ID mode */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
#endif #endif
writeb(0xff, bios); chip_writeb(0xff, bios);
myusec_delay(10); myusec_delay(10);
writeb(0x90, bios); chip_writeb(0x90, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
/* Leave ID mode */ /* Leave ID mode */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
@ -76,25 +76,25 @@ uint8_t wait_lhf00l04(volatile uint8_t *bios)
uint8_t status; uint8_t status;
uint8_t id1, id2; uint8_t id1, id2;
writeb(0x70, bios); chip_writeb(0x70, bios);
if ((readb(bios) & 0x80) == 0) { // it's busy if ((chip_readb(bios) & 0x80) == 0) { // it's busy
while ((readb(bios) & 0x80) == 0) ; while ((chip_readb(bios) & 0x80) == 0) ;
} }
status = readb(bios); status = chip_readb(bios);
// put another command to get out of status register mode // put another command to get out of status register mode
writeb(0x90, bios); chip_writeb(0x90, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
// this is needed to jam it out of "read id" mode // this is needed to jam it out of "read id" mode
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
return status; return status;
} }
@ -106,19 +106,19 @@ int erase_lhf00l04_block(struct flashchip *flash, int offset)
uint8_t status; uint8_t status;
// clear status register // clear status register
writeb(0x50, bios); chip_writeb(0x50, bios);
printf("Erase at %p\n", bios); printf("Erase at %p\n", bios);
status = wait_lhf00l04(flash->virtual_memory); status = wait_lhf00l04(flash->virtual_memory);
print_lhf00l04_status(status); print_lhf00l04_status(status);
// clear write protect // clear write protect
printf("write protect is at %p\n", (wrprotect)); printf("write protect is at %p\n", (wrprotect));
printf("write protect is 0x%x\n", readb(wrprotect)); printf("write protect is 0x%x\n", chip_readb(wrprotect));
writeb(0, wrprotect); chip_writeb(0, wrprotect);
printf("write protect is 0x%x\n", readb(wrprotect)); printf("write protect is 0x%x\n", chip_readb(wrprotect));
// now start it // now start it
writeb(0x20, bios); chip_writeb(0x20, bios);
writeb(0xd0, bios); chip_writeb(0xd0, bios);
myusec_delay(10); myusec_delay(10);
// now let's see what the register is // now let's see what the register is
status = wait_lhf00l04(flash->virtual_memory); status = wait_lhf00l04(flash->virtual_memory);
@ -149,8 +149,8 @@ void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src,
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
/* transfer data from source to destination */ /* transfer data from source to destination */
writeb(0x40, dst); chip_writeb(0x40, dst);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
wait_lhf00l04(bios); wait_lhf00l04(bios);
} }
} }
@ -163,7 +163,7 @@ int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
erase_lhf00l04(flash); erase_lhf00l04(flash);
if (readb(bios) != 0xff) { if (chip_readb(bios) != 0xff) {
printf("ERASE FAILED!\n"); printf("ERASE FAILED!\n");
return -1; return -1;
} }

50
util/flashrom/sst28sf040.c
View File

@ -34,33 +34,33 @@ static __inline__ void protect_28sf040(volatile uint8_t *bios)
{ {
uint8_t tmp; uint8_t tmp;
tmp = readb(bios + 0x1823); tmp = chip_readb(bios + 0x1823);
tmp = readb(bios + 0x1820); tmp = chip_readb(bios + 0x1820);
tmp = readb(bios + 0x1822); tmp = chip_readb(bios + 0x1822);
tmp = readb(bios + 0x0418); tmp = chip_readb(bios + 0x0418);
tmp = readb(bios + 0x041B); tmp = chip_readb(bios + 0x041B);
tmp = readb(bios + 0x0419); tmp = chip_readb(bios + 0x0419);
tmp = readb(bios + 0x040A); tmp = chip_readb(bios + 0x040A);
} }
static __inline__ void unprotect_28sf040(volatile uint8_t *bios) static __inline__ void unprotect_28sf040(volatile uint8_t *bios)
{ {
uint8_t tmp; uint8_t tmp;
tmp = readb(bios + 0x1823); tmp = chip_readb(bios + 0x1823);
tmp = readb(bios + 0x1820); tmp = chip_readb(bios + 0x1820);
tmp = readb(bios + 0x1822); tmp = chip_readb(bios + 0x1822);
tmp = readb(bios + 0x0418); tmp = chip_readb(bios + 0x0418);
tmp = readb(bios + 0x041B); tmp = chip_readb(bios + 0x041B);
tmp = readb(bios + 0x0419); tmp = chip_readb(bios + 0x0419);
tmp = readb(bios + 0x041A); tmp = chip_readb(bios + 0x041A);
} }
static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, static __inline__ int erase_sector_28sf040(volatile uint8_t *bios,
unsigned long address) unsigned long address)
{ {
writeb(AUTO_PG_ERASE1, bios); chip_writeb(AUTO_PG_ERASE1, bios);
writeb(AUTO_PG_ERASE2, bios + address); chip_writeb(AUTO_PG_ERASE2, bios + address);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -83,8 +83,8 @@ static __inline__ int write_sector_28sf040(volatile uint8_t *bios,
continue; continue;
} }
/*issue AUTO PROGRAM command */ /*issue AUTO PROGRAM command */
writeb(AUTO_PGRM, dst); chip_writeb(AUTO_PGRM, dst);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(bios); toggle_ready_jedec(bios);
@ -98,16 +98,16 @@ int probe_28sf040(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2; uint8_t id1, id2;
writeb(RESET, bios); chip_writeb(RESET, bios);
myusec_delay(10); myusec_delay(10);
writeb(READ_ID, bios); chip_writeb(READ_ID, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
myusec_delay(10); myusec_delay(10);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
writeb(RESET, bios); chip_writeb(RESET, bios);
myusec_delay(10); myusec_delay(10);
printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
@ -122,8 +122,8 @@ int erase_28sf040(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
unprotect_28sf040(bios); unprotect_28sf040(bios);
writeb(CHIP_ERASE, bios); chip_writeb(CHIP_ERASE, bios);
writeb(CHIP_ERASE, bios); chip_writeb(CHIP_ERASE, bios);
protect_28sf040(bios); protect_28sf040(bios);
myusec_delay(10); myusec_delay(10);

42
util/flashrom/sst49lfxxxc.c
View File

@ -50,20 +50,20 @@ static __inline__ int write_lockbits_49lfxxxc(volatile uint8_t *bios, int size,
//printf("bios=0x%08lx\n", (unsigned long)bios); //printf("bios=0x%08lx\n", (unsigned long)bios);
for (i = 0; left > 65536; i++, left -= 65536) { for (i = 0; left > 65536; i++, left -= 65536) {
//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) ); //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFC00000 - size + (i * 65536) + 2, *(bios + (i * 65536) + 2) );
writeb(bits, bios + (i * 65536) + 2); chip_writeb(bits, bios + (i * 65536) + 2);
} }
address = i * 65536; address = i * 65536;
//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
writeb(bits, bios + address + 2); chip_writeb(bits, bios + address + 2);
address += 32768; address += 32768;
//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
writeb(bits, bios + address + 2); chip_writeb(bits, bios + address + 2);
address += 8192; address += 8192;
//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
writeb(bits, bios + address + 2); chip_writeb(bits, bios + address + 2);
address += 8192; address += 8192;
//printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) ); //printf("lockbits at address=0x%08lx is 0x%01x\n", (unsigned long)0xFFc00000 - size + address + 2, *(bios + address + 2) );
writeb(bits, bios + address + 2); chip_writeb(bits, bios + address + 2);
return 0; return 0;
} }
@ -73,14 +73,14 @@ static __inline__ int erase_sector_49lfxxxc(volatile uint8_t *bios,
{ {
unsigned char status; unsigned char status;
writeb(SECTOR_ERASE, bios); chip_writeb(SECTOR_ERASE, bios);
writeb(ERASE, bios + address); chip_writeb(ERASE, bios + address);
do { do {
status = readb(bios); status = chip_readb(bios);
if (status & (STATUS_ESS | STATUS_BPS)) { if (status & (STATUS_ESS | STATUS_BPS)) {
printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status); printf("sector erase FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)bios + address, status);
writeb(CLEAR_STATUS, bios); chip_writeb(CLEAR_STATUS, bios);
return (-1); return (-1);
} }
} while (!(status & STATUS_WSMS)); } while (!(status & STATUS_WSMS));
@ -96,7 +96,7 @@ static __inline__ int write_sector_49lfxxxc(volatile uint8_t *bios,
int i; int i;
unsigned char status; unsigned char status;
writeb(CLEAR_STATUS, bios); chip_writeb(CLEAR_STATUS, bios);
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
/* transfer data from source to destination */ /* transfer data from source to destination */
if (*src == 0xFF) { if (*src == 0xFF) {
@ -105,14 +105,14 @@ static __inline__ int write_sector_49lfxxxc(volatile uint8_t *bios,
continue; continue;
} }
/*issue AUTO PROGRAM command */ /*issue AUTO PROGRAM command */
writeb(AUTO_PGRM, bios); chip_writeb(AUTO_PGRM, bios);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
do { do {
status = readb(bios); status = chip_readb(bios);
if (status & (STATUS_ESS | STATUS_BPS)) { if (status & (STATUS_ESS | STATUS_BPS)) {
printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status); printf("sector write FAILED at address=0x%08lx status=0x%01x\n", (unsigned long)dst, status);
writeb(CLEAR_STATUS, bios); chip_writeb(CLEAR_STATUS, bios);
return (-1); return (-1);
} }
} while (!(status & STATUS_WSMS)); } while (!(status & STATUS_WSMS));
@ -127,13 +127,13 @@ int probe_49lfxxxc(struct flashchip *flash)
uint8_t id1, id2; uint8_t id1, id2;
writeb(RESET, bios); chip_writeb(RESET, bios);
writeb(READ_ID, bios); chip_writeb(READ_ID, bios);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
writeb(RESET, bios); chip_writeb(RESET, bios);
printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
@ -157,7 +157,7 @@ int erase_49lfxxxc(struct flashchip *flash)
if (erase_sector_49lfxxxc(bios, i) != 0) if (erase_sector_49lfxxxc(bios, i) != 0)
return (-1); return (-1);
writeb(RESET, bios); chip_writeb(RESET, bios);
return 0; return 0;
} }
@ -183,7 +183,7 @@ int write_49lfxxxc(struct flashchip *flash, uint8_t *buf)
} }
printf("\n"); printf("\n");
writeb(RESET, bios); chip_writeb(RESET, bios);
return 0; return 0;
} }

2
util/flashrom/sst_fwhub.c
View File

@ -51,7 +51,7 @@ int erase_sst_fwhub_block(struct flashchip *flash, int offset)
volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2; volatile uint8_t *wrprotect = flash->virtual_registers + offset + 2;
// clear write protect // clear write protect
writeb(0, wrprotect); chip_writeb(0, wrprotect);
erase_block_jedec(flash->virtual_memory, offset); erase_block_jedec(flash->virtual_memory, offset);
toggle_ready_jedec(flash->virtual_memory); toggle_ready_jedec(flash->virtual_memory);

64
util/flashrom/stm50flw0x0x.c
View File

@ -33,9 +33,9 @@
void protect_stm50flw0x0x(volatile uint8_t *bios) void protect_stm50flw0x0x(volatile uint8_t *bios)
{ {
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xA0, bios + 0x5555); chip_writeb(0xA0, bios + 0x5555);
usleep(200); usleep(200);
} }
@ -47,37 +47,37 @@ int probe_stm50flw0x0x(struct flashchip *flash)
uint32_t largeid1, largeid2; uint32_t largeid1, largeid2;
/* Issue JEDEC Product ID Entry command */ /* Issue JEDEC Product ID Entry command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
myusec_delay(40); myusec_delay(40);
/* Read product ID */ /* Read product ID */
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
largeid1 = id1; largeid1 = id1;
largeid2 = id2; largeid2 = id2;
/* Check if it is a continuation ID, this should be a while loop. */ /* Check if it is a continuation ID, this should be a while loop. */
if (id1 == 0x7F) { if (id1 == 0x7F) {
largeid1 <<= 8; largeid1 <<= 8;
id1 = readb(bios + 0x100); id1 = chip_readb(bios + 0x100);
largeid1 |= id1; largeid1 |= id1;
} }
if (id2 == 0x7F) { if (id2 == 0x7F) {
largeid2 <<= 8; largeid2 <<= 8;
id2 = readb(bios + 0x101); id2 = chip_readb(bios + 0x101);
largeid2 |= id2; largeid2 |= id2;
} }
/* Issue JEDEC Product ID Exit command */ /* Issue JEDEC Product ID Exit command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(40); myusec_delay(40);
printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1,
@ -96,21 +96,21 @@ static void wait_stm50flw0x0x(volatile uint8_t *bios)
uint8_t id1; uint8_t id1;
// id2; // id2;
writeb(0x70, bios); chip_writeb(0x70, bios);
if ((readb(bios) & 0x80) == 0) { // it's busy if ((chip_readb(bios) & 0x80) == 0) { // it's busy
while ((readb(bios) & 0x80) == 0) ; while ((chip_readb(bios) & 0x80) == 0) ;
} }
// put another command to get out of status register mode // put another command to get out of status register mode
writeb(0x90, bios); chip_writeb(0x90, bios);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
// this is needed to jam it out of "read id" mode // this is needed to jam it out of "read id" mode
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
} }
/* /*
@ -142,8 +142,8 @@ int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
// unlock each 4k-sector // unlock each 4k-sector
for (j = 0; j < 0x10000; j += 0x1000) { for (j = 0; j < 0x10000; j += 0x1000) {
printf_debug("unlocking at 0x%x\n", offset + j); printf_debug("unlocking at 0x%x\n", offset + j);
writeb(unlock_sector, flash_addr + offset + j); chip_writeb(unlock_sector, flash_addr + offset + j);
if (readb(flash_addr + offset + j) != unlock_sector) { if (chip_readb(flash_addr + offset + j) != unlock_sector) {
printf("Cannot unlock sector @ 0x%x\n", printf("Cannot unlock sector @ 0x%x\n",
offset + j); offset + j);
return -1; return -1;
@ -151,8 +151,8 @@ int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
} }
} else { } else {
printf_debug("unlocking at 0x%x\n", offset); printf_debug("unlocking at 0x%x\n", offset);
writeb(unlock_sector, flash_addr + offset); chip_writeb(unlock_sector, flash_addr + offset);
if (readb(flash_addr + offset) != unlock_sector) { if (chip_readb(flash_addr + offset) != unlock_sector) {
printf("Cannot unlock sector @ 0x%x\n", offset); printf("Cannot unlock sector @ 0x%x\n", offset);
return -1; return -1;
} }
@ -167,17 +167,17 @@ int erase_block_stm50flw0x0x(struct flashchip *flash, int offset)
int j; int j;
// clear status register // clear status register
writeb(0x50, bios); chip_writeb(0x50, bios);
printf_debug("Erase at %p\n", bios); printf_debug("Erase at %p\n", bios);
// now start it // now start it
writeb(0x20, bios); chip_writeb(0x20, bios);
writeb(0xd0, bios); chip_writeb(0xd0, bios);
myusec_delay(10); myusec_delay(10);
wait_stm50flw0x0x(flash->virtual_memory); wait_stm50flw0x0x(flash->virtual_memory);
for (j = 0; j < flash->page_size; j++) { for (j = 0; j < flash->page_size; j++) {
if (readb(bios + j) != 0xFF) { if (chip_readb(bios + j) != 0xFF) {
printf("Erase failed at 0x%x\n", offset + j); printf("Erase failed at 0x%x\n", offset + j);
return -1; return -1;
} }
@ -197,8 +197,8 @@ int write_page_stm50flw0x0x(volatile uint8_t *bios, uint8_t *src,
/* transfer data from source to destination */ /* transfer data from source to destination */
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
writeb(0x40, dst); chip_writeb(0x40, dst);
writeb(*src++, dst++); chip_writeb(*src++, dst++);
wait_stm50flw0x0x(bios); wait_stm50flw0x0x(bios);
} }
@ -210,7 +210,7 @@ int write_page_stm50flw0x0x(volatile uint8_t *bios, uint8_t *src,
dst = d; dst = d;
src = s; src = s;
for (i = 0; i < page_size; i++) { for (i = 0; i < page_size; i++) {
if (readb(dst) != *src) { if (chip_readb(dst) != *src) {
rc = -1; rc = -1;
break; break;
} }

22
util/flashrom/w29ee011.c
View File

@ -37,29 +37,29 @@ int probe_w29ee011(struct flashchip *flash)
} }
/* Issue JEDEC Product ID Entry command */ /* Issue JEDEC Product ID Entry command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x60, bios + 0x5555); chip_writeb(0x60, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
/* Read product ID */ /* Read product ID */
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 0x01); id2 = chip_readb(bios + 0x01);
/* Issue JEDEC Product ID Exit command */ /* Issue JEDEC Product ID Exit command */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);

18
util/flashrom/w39v040c.c
View File

@ -26,22 +26,22 @@ int probe_w39v040c(struct flashchip *flash)
volatile uint8_t *bios = flash->virtual_memory; volatile uint8_t *bios = flash->virtual_memory;
uint8_t id1, id2, lock; uint8_t id1, id2, lock;
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
id1 = readb(bios); id1 = chip_readb(bios);
id2 = readb(bios + 1); id2 = chip_readb(bios + 1);
lock = readb(bios + 0xfff2); lock = chip_readb(bios + 0xfff2);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
myusec_delay(10); myusec_delay(10);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(40); myusec_delay(40);
printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);

52
util/flashrom/w39v080fa.c
View File

@ -27,19 +27,19 @@ int probe_winbond_fwhub(struct flashchip *flash)
uint8_t vid, did; uint8_t vid, did;
/* Product Identification Entry */ /* Product Identification Entry */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
/* Read product ID */ /* Read product ID */
vid = readb(bios); vid = chip_readb(bios);
did = readb(bios + 0x01); did = chip_readb(bios + 0x01);
/* Product Identifixation Exit */ /* Product Identifixation Exit */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did); printf_debug("%s: vid 0x%x, did 0x%x\n", __FUNCTION__, vid, did);
@ -58,16 +58,16 @@ static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset)
uint8_t locking; uint8_t locking;
printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset, printf_debug("Trying to unlock block @0x%08x = 0x%02x\n", offset,
readb(wrprotect)); chip_readb(wrprotect));
locking = readb(wrprotect); locking = chip_readb(wrprotect);
switch (locking & 0x7) { switch (locking & 0x7) {
case 0: case 0:
printf_debug("Full Access.\n"); printf_debug("Full Access.\n");
return 0; return 0;
case 1: case 1:
printf_debug("Write Lock (Default State).\n"); printf_debug("Write Lock (Default State).\n");
writeb(0, wrprotect); chip_writeb(0, wrprotect);
return 0; return 0;
case 2: case 2:
printf_debug("Locked Open (Full Access, Lock Down).\n"); printf_debug("Locked Open (Full Access, Lock Down).\n");
@ -77,11 +77,11 @@ static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset)
return -1; return -1;
case 4: case 4:
printf_debug("Read Lock.\n"); printf_debug("Read Lock.\n");
writeb(0, wrprotect); chip_writeb(0, wrprotect);
return 0; return 0;
case 5: case 5:
printf_debug("Read/Write Lock.\n"); printf_debug("Read/Write Lock.\n");
writeb(0, wrprotect); chip_writeb(0, wrprotect);
return 0; return 0;
case 6: case 6:
fprintf(stderr, "Error: Read Lock, Locked Down.\n"); fprintf(stderr, "Error: Read Lock, Locked Down.\n");
@ -106,18 +106,18 @@ int unlock_winbond_fwhub(struct flashchip *flash)
*/ */
/* Product Identification Entry */ /* Product Identification Entry */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x90, bios + 0x5555); chip_writeb(0x90, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
/* Read Hardware Lock Bits */ /* Read Hardware Lock Bits */
locking = readb(bios + 0xffff2); locking = chip_readb(bios + 0xffff2);
/* Product Identification Exit */ /* Product Identification Exit */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0xF0, bios + 0x5555); chip_writeb(0xF0, bios + 0x5555);
myusec_delay(10); myusec_delay(10);
printf_debug("Lockout bits:\n"); printf_debug("Lockout bits:\n");
@ -151,13 +151,13 @@ static int erase_sector_winbond_fwhub(volatile uint8_t *bios,
printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector); printf("0x%08x\b\b\b\b\b\b\b\b\b\b", sector);
/* Sector Erase */ /* Sector Erase */
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x80, bios + 0x5555); chip_writeb(0x80, bios + 0x5555);
writeb(0xAA, bios + 0x5555); chip_writeb(0xAA, bios + 0x5555);
writeb(0x55, bios + 0x2AAA); chip_writeb(0x55, bios + 0x2AAA);
writeb(0x30, bios + sector); chip_writeb(0x30, bios + sector);
/* wait for Toggle bit ready */ /* wait for Toggle bit ready */
toggle_ready_jedec(bios); toggle_ready_jedec(bios);