libpayload arm64: Make exceptions work
BUG=chrome-os-partner:31634 BRANCH=None TEST=test_exc generates and handles exceptions properly Change-Id: If3ecab93be6d02942b52960ec97edc687bedf64b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: bba2caae0bd436ba9e5215f5d8606ce8c4987c98 Original-Change-Id: I4abe8a0e426eab2532852179dbb32505353cd0a1 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/214609 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8783 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Patrick Georgi
parent
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commit
3b1ee0387c
@@ -35,11 +35,13 @@
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* Move exception id into x1
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* Branch to exception_handler
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*/
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.macro eentry id
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stp x30, xzr, [sp, #-16]!
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bl exception_prologue
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mov x1, \id
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bl exception_handler
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.macro eentry lbl id
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.align 7
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\lbl:
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stp x30, xzr, [sp, #-16]!
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bl exception_prologue
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mov x1, \id
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bl exception_handler
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.endm
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/* Exception table has 16 entries and each of 128 bytes
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@@ -51,37 +53,22 @@
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.global exception_table
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exception_table:
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.align 7
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sync_el0:
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eentry #0
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.align 7
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irq_el0:
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eentry #0
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.align 7
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fiq_el0:
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eentry #0
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.align 7
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serror_el0:
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eentry #0
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.align 7
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sync_elx:
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eentry #1
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.align 7
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irq_elx:
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eentry #2
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.align 7
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fiq_elx:
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eentry #3
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.align 7
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serror_elx:
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eentry #4
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eentry sync_sp0,#0
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eentry irq_sp0,#1
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eentry fiq_sp0,#2
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eentry serror_sp0,#3
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eentry sync_spx,#4
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eentry irq_spx,#5
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eentry fiq_spx,#6
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eentry serror_spx,#7
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eentry sync_elx_64,#8
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eentry irq_elx_64,#9
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eentry fiq_elx_64,#10
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eentry serror_elx_64,#11
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eentry sync_elx_32,#12
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eentry irq_elx_32,#13
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eentry fiq_elx_32,#14
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eentry serror_elx_32,#15
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exception_prologue:
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/* Save all registers x0-x29 */
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@@ -119,6 +106,8 @@ exception_handler:
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/* Pop return address saved on stack */
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ldp x0, x1, [sp], #16
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msr elr_el3, x0
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msr esr_el3, x1
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/* Pop exception reason saved on stack, followed by regs x0-x30 */
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ldp x0, x1, [sp], #16
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ldp x2, x3, [sp], #16
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