sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

device: Add support for multiple PCI segment groups

Browse Source 
Add initial support for multiple PCI segment groups. Instead of
modifying secondary in the bus struct introduce a new segment_group
struct element and keep existing common code.

Since all platforms currently only use 1 segment this is not a
functional change. On platforms that support more than 1 segment the
segment has to be set when creating the PCI domain.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held
2024-01-11 22:26:18 +01:00
parent 090ea7ab8f
commit 3b5b66d829
19 changed files with 96 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
src/device/Kconfig
View File

@@ -589,6 +589,13 @@ config ECAM_MMCONF_BASE_ADDRESS
config ECAM_MMCONF_BUS_NUMBER
int
depends on ECAM_MMCONF_SUPPORT
help
Total number of PCI buses in the system across all segment groups.
The number needs to be a power of 2. For values <= 256,
PCI_BUSES_PER_SEGMENT_GROUP is CONFIG_ECAM_MMCONF_BUS_NUMBER and
PCI_SEGMENT_GROUP_COUNT is 1. For values > 256,
PCI_BUSES_PER_SEGMENT_GROUP is 256 and PCI_SEGMENT_GROUP_COUNT is
CONFIG_ECAM_MMCONF_BUS_NUMBER / 256.
config ECAM_MMCONF_LENGTH
hex
@@ -597,6 +604,8 @@ config ECAM_MMCONF_LENGTH
default 0x04000000 if ECAM_MMCONF_BUS_NUMBER = 64
default 0x08000000 if ECAM_MMCONF_BUS_NUMBER = 128
default 0x10000000 if ECAM_MMCONF_BUS_NUMBER = 256
default 0x20000000 if ECAM_MMCONF_BUS_NUMBER = 512
default 0x80000000 if ECAM_MMCONF_BUS_NUMBER = 1024
default 0x0
config PCI_ALLOW_BUS_MASTER

16
src/device/device.c
View File

@@ -152,8 +152,8 @@ static void read_resources(struct bus *bus)
{
struct device *curdev;
printk(BIOS_SPEW, "%s %s bus %d link: %d\n", dev_path(bus->dev),
__func__, bus->secondary, bus->link_num);
printk(BIOS_SPEW, "%s %s segment group %d bus %d link: %d\n", dev_path(bus->dev),
__func__, bus->segment_group, bus->secondary, bus->link_num);
/* Walk through all devices and find which resources they need. */
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
@@ -176,8 +176,8 @@ static void read_resources(struct bus *bus)
read_resources(link);
}
post_log_clear();
printk(BIOS_SPEW, "%s %s bus %d link: %d done\n",
dev_path(bus->dev), __func__, bus->secondary, bus->link_num);
printk(BIOS_SPEW, "%s %s segment group %d bus %d link: %d done\n",
dev_path(bus->dev), __func__, bus->segment_group, bus->secondary, bus->link_num);
}
struct device *vga_pri = NULL;
@@ -266,8 +266,8 @@ void assign_resources(struct bus *bus)
{
struct device *curdev;
printk(BIOS_SPEW, "%s %s, bus %d link: %d\n",
dev_path(bus->dev), __func__, bus->secondary, bus->link_num);
printk(BIOS_SPEW, "%s %s, segment group %d bus %d link: %d\n",
dev_path(bus->dev), __func__, bus->segment_group, bus->secondary, bus->link_num);
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
if (!curdev->enabled || !curdev->resource_list)
@@ -282,8 +282,8 @@ void assign_resources(struct bus *bus)
curdev->ops->set_resources(curdev);
}
post_log_clear();
printk(BIOS_SPEW, "%s %s, bus %d link: %d done\n",
dev_path(bus->dev), __func__, bus->secondary, bus->link_num);
printk(BIOS_SPEW, "%s %s, segment group %d bus %d link: %d done\n",
dev_path(bus->dev), __func__, bus->segment_group, bus->secondary, bus->link_num);
}
/**

3
src/device/device_const.c
View File

@@ -35,6 +35,7 @@ static DEVTREE_CONST struct device *dev_find_slot(unsigned int bus,
for (dev = all_devices; dev; dev = dev->next) {
if ((dev->path.type == DEVICE_PATH_PCI) &&
(dev->bus->secondary == bus) &&
(dev->bus->segment_group == 0) &&
(dev->path.pci.devfn == devfn)) {
result = dev;
break;
@@ -233,7 +234,7 @@ DEVTREE_CONST struct device *pcidev_path_on_bus(unsigned int bus, pci_devfn_t de
dev = dev->next;
continue;
}
if (dev->bus->secondary == bus)
if (dev->bus->secondary == bus && dev->bus->segment_group == 0)
return pcidev_path_behind(dev->bus, devfn);
dev = dev->next;
}

10
src/device/device_util.c
View File

@@ -97,7 +97,7 @@ u32 dev_path_encode(const struct device *dev)
case DEVICE_PATH_ROOT:
break;
case DEVICE_PATH_PCI:
ret |= dev->bus->secondary << 8 | dev->path.pci.devfn;
ret |= dev->bus->segment_group << 16 | dev->bus->secondary << 8 | dev->path.pci.devfn;
break;
case DEVICE_PATH_PNP:
ret |= dev->path.pnp.port << 8 | dev->path.pnp.device;
@@ -168,7 +168,8 @@ const char *dev_path(const struct device *dev)
break;
case DEVICE_PATH_PCI:
snprintf(buffer, sizeof(buffer),
"PCI: %02x:%02x.%01x",
"PCI: %02x:%02x:%02x.%01x",
dev->bus->segment_group,
dev->bus->secondary,
PCI_SLOT(dev->path.pci.devfn),
PCI_FUNC(dev->path.pci.devfn));
@@ -525,7 +526,8 @@ void report_resource_stored(struct device *dev, const struct resource *resource,
if (dev->link_list && (resource->flags & IORESOURCE_PCI_BRIDGE)) {
snprintf(buf, sizeof(buf),
"bus %02x ", dev->link_list->secondary);
"seg %02x bus %02x ", dev->link_list->segment_group,
dev->link_list->secondary);
}
printk(BIOS_DEBUG, "%s %02lx <- [0x%016llx - 0x%016llx] size 0x%08llx "
"gran 0x%02x %s%s%s\n", dev_path(dev), resource->index,
@@ -982,5 +984,5 @@ bool is_enabled_pci(const struct device *pci)
bool is_pci_dev_on_bus(const struct device *pci, unsigned int bus)
{
return is_pci(pci) && pci->bus->secondary == bus;
return is_pci(pci) && pci->bus->segment_group == 0 && pci->bus->secondary == bus;
}

15
src/device/pci_device.c
View File

@@ -846,6 +846,12 @@ static int should_run_oprom(struct device *dev, struct rom_header *rom)
{
static int should_run = -1;
if (dev->bus->segment_group) {
printk(BIOS_ERR, "Only option ROMs of devices in first PCI segment group can "
"be run.\n");
return 0;
}
if (CONFIG(VENDORCODE_ELTAN_VBOOT))
if (rom != NULL)
if (!verified_boot_should_run_oprom(rom))
@@ -1314,7 +1320,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
*/
unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev)
{
return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) &&
return dev->bus->secondary == PCI_DEV2BUS(sdev) &&
dev->bus->segment_group == PCI_DEV2SEG(sdev) &&
dev->path.pci.devfn == PCI_DEV2DEVFN(sdev);
}
@@ -1428,7 +1435,8 @@ void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
struct device *dev, **prev;
int once = 0;
printk(BIOS_DEBUG, "PCI: %s for bus %02x\n", __func__, bus->secondary);
printk(BIOS_DEBUG, "PCI: %s for segment group %02x bus %02x\n", __func__,
bus->segment_group, bus->secondary);
/* Maximum sane devfn is 0xFF. */
if (max_devfn > 0xff) {
@@ -1549,7 +1557,8 @@ static void pci_bridge_route(struct bus *link, scan_state state)
link->subordinate = link->secondary + dev->hotplug_buses;
link->max_subordinate = parent->max_subordinate
? parent->max_subordinate
: (CONFIG_ECAM_MMCONF_BUS_NUMBER - 1);
: (PCI_BUSES_PER_SEGMENT_GROUP - 1);
link->segment_group = parent->segment_group;
}
if (link->secondary > link->max_subordinate)

4
src/device/pci_rom.c
View File

@@ -230,6 +230,10 @@ ati_rom_acpi_fill_vfct(const struct device *device, acpi_vfct_t *vfct_struct,
printk(BIOS_ERR, "%s failed\n", __func__);
return current;
}
if (device->bus->segment_group) {
printk(BIOS_ERR, "VFCT only supports GPU in first PCI segment group.\n");
return current;
}
printk(BIOS_DEBUG, " Copying %sVBIOS image from %p\n",
rom == (struct rom_header *)

4
src/device/pcix_device.c
View File

@@ -110,8 +110,8 @@ void pcix_scan_bridge(struct device *dev)
pcix_tune_bus(dev->link_list);
/* Print the PCI-X bus speed. */
printk(BIOS_DEBUG, "PCI: %02x: %s\n", dev->link_list->secondary,
pcix_speed(sstatus));
printk(BIOS_DEBUG, "PCI: %02x:%02x: %s\n", dev->link_list->segment_group,
dev->link_list->secondary, pcix_speed(sstatus));
}
/** Default device operations for PCI-X bridges */