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device: Add support for multiple PCI segment groups

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Add initial support for multiple PCI segment groups. Instead of
modifying secondary in the bus struct introduce a new segment_group
struct element and keep existing common code.

Since all platforms currently only use 1 segment this is not a
functional change. On platforms that support more than 1 segment the
segment has to be set when creating the PCI domain.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held
2024-01-11 22:26:18 +01:00
parent 090ea7ab8f
commit 3b5b66d829
19 changed files with 96 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/include/device/device.h
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@@ -86,6 +86,7 @@ struct bus {
uint16_t secondary; /* secondary bus number */
uint16_t subordinate; /* subordinate bus number */
uint16_t max_subordinate; /* max subordinate bus number */
uint8_t segment_group; /* PCI segment group */
unsigned int reset_needed : 1;
unsigned int no_vga16 : 1; /* No support for 16-bit VGA decoding */

13
src/include/device/pci_def.h
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@@ -591,9 +591,22 @@
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)
/*
* CONFIG_ECAM_MMCONF_BUS_NUMBER is a power of 2. For values <= 256,
* PCI_BUSES_PER_SEGMENT_GROUP is CONFIG_ECAM_MMCONF_BUS_NUMBER and PCI_SEGMENT_GROUP_COUNT
* is 1. For values > 256, PCI_BUSES_PER_SEGMENT_GROUP is 256 and PCI_SEGMENT_GROUP_COUNT is
* CONFIG_ECAM_MMCONF_BUS_NUMBER / 256.
*/
#define PCI_BUS_NUMBER_MASK 0xff
#define PCI_SEGMENT_GROUP_COUNT (((CONFIG_ECAM_MMCONF_BUS_NUMBER - 1) >> 8) + 1)
#define PCI_BUSES_PER_SEGMENT_GROUP (((CONFIG_ECAM_MMCONF_BUS_NUMBER - 1) & PCI_BUS_NUMBER_MASK) + 1)
#define PCI_PER_SEGMENT_GROUP_ECAM_SIZE (256 * MiB)
/* Translation from PCI_DEV() to devicetree bus and path.pci.devfn. */
#define PCI_DEV2DEVFN(sdev) (((sdev)>>12) & 0xff)
#define PCI_DEV2SEGBUS(sdev) (((sdev)>>20) & 0xfff)
#define PCI_DEV2BUS(sdev) (((sdev)>>20) & PCI_BUS_NUMBER_MASK)
#define PCI_DEV2SEG(sdev) (((sdev)>>28) & 0xf)
/* Fields from within the device's class value. */
#define PCI_CLASS_GET_DEVICE(c) (c >> 8)

3
src/include/device/pci_ops.h
View File

@@ -12,7 +12,8 @@ void __noreturn pcidev_die(void);
static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev)
{
return (dev->path.pci.devfn << 12) | (dev->bus->secondary << 20);
return (dev->path.pci.devfn << 12) | (dev->bus->secondary << 20) |
(dev->bus->segment_group << 28);
}
static __always_inline pci_devfn_t pcidev_assert(const struct device *dev)