sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

intel/skylake: Add support to enable wake-on-usb attach/detach

Browse Source 
Three things are required to enable wake-on-usb:
1. 5V to USB ports should be enabled in S3.
2. ASL file needs to have appropriate wake bit set.
3. XHCI controller should have the wake on attach/detach bit set for the
corresponding port in PORTSCN register.

Only part missing was #3.

This CL adds support to allow mainboard to define a bitmap in
devicetree corresponding to the ports that it wants to enable
wake-on-usb feature. Based on the bitmap, wake on attach/detach bits in
PORTSCN would be set by xhci.asl for the appropriate ports.

BUG=chrome-os-partner:58734
BRANCH=None
TEST=Verified that with port 5 enabled, chell wakes up from S3 on usb
attach/detach.

Change-Id: I40a22a450e52f74a0ab93ebb8170555d834ebdaf
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17056
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh
2016-10-18 14:25:25 -07:00
committed by Furquan Shaikh
parent ffb3a2d225
commit 3bfe3404df
6 changed files with 73 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/soc/intel/skylake/chip.h
View File

@@ -395,6 +395,12 @@ struct soc_intel_skylake_config {
/* Use custom SD card detect GPIO configuration */
struct acpi_gpio sdcard_cd_gpio;
/* Wake Enable Bitmap for USB2 ports */
u16 usb2_wake_enable_bitmap;
/* Wake Enable Bitmap for USB3 ports */
u8 usb3_wake_enable_bitmap;
};
typedef struct soc_intel_skylake_config config_t;