inteltool: add support for CannonPoint-LP

Add support for CannonPoint-LP U Premium
(CoffeeLake-U and WhiskeyLake-U)

GPIO info taken from:
- Intel doc #337867-002
- coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs.h

Test: Read GPIOs from out-of-tree WhiskeyLake-U board

Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: I70f23eec71abb8d7c2a7a109c9e760bb31dee2ff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39393
Reviewed-by: Michael Niewöhner
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier
2019-06-11 23:23:46 -05:00
committed by Patrick Georgi
parent e32ded82f0
commit 3c78445ad9
9 changed files with 366 additions and 0 deletions

View File

@ -272,6 +272,8 @@ int print_epbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
break;
@ -399,6 +401,8 @@ int print_dmibar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
dmi_registers = skylake_dmi_registers;
size = ARRAY_SIZE(skylake_dmi_registers);
dmibar_phys = pci_read_long(nb, 0x68);
@ -510,6 +514,8 @@ int print_pciexbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
pciexbar_reg = pci_read_long(nb, 0x60);
pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
break;