inteltool: add support for CannonPoint-LP
Add support for CannonPoint-LP U Premium (CoffeeLake-U and WhiskeyLake-U) GPIO info taken from: - Intel doc #337867-002 - coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs.h Test: Read GPIOs from out-of-tree WhiskeyLake-U board Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Change-Id: I70f23eec71abb8d7c2a7a109c9e760bb31dee2ff Reviewed-on: https://review.coreboot.org/c/coreboot/+/39393 Reviewed-by: Michael Niewöhner Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Patrick Georgi
parent
e32ded82f0
commit
3c78445ad9
@ -272,6 +272,8 @@ int print_epbar(struct pci_dev *nb)
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
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epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
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epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
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break;
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@ -399,6 +401,8 @@ int print_dmibar(struct pci_dev *nb)
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
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dmi_registers = skylake_dmi_registers;
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size = ARRAY_SIZE(skylake_dmi_registers);
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dmibar_phys = pci_read_long(nb, 0x68);
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@ -510,6 +514,8 @@ int print_pciexbar(struct pci_dev *nb)
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
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case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1:
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case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2:
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pciexbar_reg = pci_read_long(nb, 0x60);
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pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
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break;
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