sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

baytrail: Add EHCI initialization

Browse Source 
This adds required steps to initialize the EHCI controller
on the baytrail platform.

BUG=chrome-os-partner:23635
BRANCH=rambi
TEST=build and boot from USB on rambi

Change-Id: I3a5487791e2305616036d4550e260a178c0e1c4d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175512
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4930
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Duncan Laurie
2013-11-01 13:34:00 -07:00
committed by Aaron Durbin
parent f81a91a768
commit 3c9f17462a
5 changed files with 252 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/intel/baytrail/chip.h
View File

@@ -36,6 +36,16 @@ struct soc_intel_baytrail_config {
/* USB routing */
int usb_route_to_xhci;
/* USB PHY settings specific to the board */
uint32_t usb2_per_port_lane0;
uint32_t usb2_per_port_rcomp_hs_pullup0;
uint32_t usb2_per_port_lane1;
uint32_t usb2_per_port_rcomp_hs_pullup1;
uint32_t usb2_per_port_lane2;
uint32_t usb2_per_port_rcomp_hs_pullup2;
uint32_t usb2_per_port_lane3;
uint32_t usb2_per_port_rcomp_hs_pullup3;
};
extern struct chip_operations soc_intel_baytrail_ops;