baytrail: print dram configuration

After running the MRC blob print out some information
on the training: MRC version, number channels, DDR3
type, and DRAM frequency.

Example output:
MRC v0.90
2 channels of DDR3 @ 1066MHz

Apparently there are two dunit IOSF ports -- 1 for each
channel. However, certain registers really on live in
channel 0. Thus, there was some changes to dunit support
in the iosf area.

BUG=chrome-os-partner:22875
BRANCH=None
TEST=Built and booted bayleybay in different configs.

Change-Id: Ib306432b55f9222b4eb3d14b2467bc0e7617e24f
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172770
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4882
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

src/soc/intel/baytrail/iosf.c

@@ -70,6 +70,21 @@ uint32_t iosf_dunit_read(int reg)
 	return read_iosf_reg(MDR_REG);
 }
 
+uint32_t iosf_dunit_ch0_read(int reg)
+{
+	return iosf_dunit_read(reg);
+}
+
+uint32_t iosf_dunit_ch1_read(int reg)
+{
+	uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) |
+	              IOSF_PORT(IOSF_PORT_DUNIT_CH1) | IOSF_REG(reg) |
+	              IOSF_BYTE_EN;
+
+	write_iosf_reg(MCR_REG, cr);
+	return read_iosf_reg(MDR_REG);
+}
+
 void iosf_dunit_write(int reg, uint32_t val)
 {
 	uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) |