build system: use a single variable name for compiler runtimes

We build with either gcc or clang, no need to keep both around

Change-Id: I9af2cc7636bdc791a68ba8ed6e7c5a81973c5dfd
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7552
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

Makefile

@@ -246,7 +246,6 @@ printall:
 	@echo alldirs:=$(alldirs)
 	@echo allsrcs=$(allsrcs)
 	@echo DEPENDENCIES=$(DEPENDENCIES)
-	@echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class))
 	@$(foreach class,$(special-classes),echo $(class):='$($(class))'; )
 
 endif