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soc/amd/stoneyridge/northbridge.c: Fix bit definitions

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The latest public BKDG (3.6) releases some previously undefined (reserved)
bits. Fix these definitions, including the header file where they are
defined.

BUG=b:77940747
TEST=Build and boot grunt.

Change-Id: Icb5334110248d7806421200a161fa3befefcea8a
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25665
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Richard Spiegel
2018-04-13 13:20:08 -07:00
committed by Patrick Georgi
parent bbcfa8afd5
commit 3d34ae3fc4
2 changed files with 7 additions and 3 deletions
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4
src/soc/amd/stoneyridge/include/soc/northbridge.h
View File

@@ -20,6 +20,10 @@
#include <arch/io.h>
#include <device/device.h>
/* D1F1 - HDA Configuration Registers */
#define HDA_DEV_CTRL_STATUS 0x60
#define HDA_NO_SNOOP_EN BIT(11)
/* D18F0 - HT Configuration Registers */
#define D18F0_NODE_ID 0x60
#define D18F0_CPU_CNT 0x62 /* BKDG defines as a field in DWORD 0x60 */

6
src/soc/amd/stoneyridge/northbridge.c
View File

@@ -363,9 +363,9 @@ void fam15_finalize(void *chip_info)
/* disable No Snoop */
dev = dev_find_slot(0, HDA0_DEVFN);
value = pci_read_config32(dev, 0x60);
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
value = pci_read_config32(dev, HDA_DEV_CTRL_STATUS);
value &= ~HDA_NO_SNOOP_EN;
pci_write_config32(dev, HDA_DEV_CTRL_STATUS, value);
}
void domain_read_resources(device_t dev)