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mb/google/brya: Replace white space with tab

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This patch unifies line indentation.

Change-Id: Ieeb580057d8abb20afe3a5d73f5f835e6d31c899
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik
2021-09-10 00:21:23 +05:30
parent e5cf666b9a
commit 3d469fad97
6 changed files with 24 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
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@@ -11,8 +11,8 @@ chip soc/intel/alderlake
# EC memory map range is 0x900-0x9ff # EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901" register "gen3_dec" = "0x00fc0901"
# S0ix enable # S0ix enable
register "s0ix_enable" = "1" register "s0ix_enable" = "1"
# DPTF enable # DPTF enable
register "dptf_enable" = "1" register "dptf_enable" = "1"

24
src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
View File

@@ -13,8 +13,8 @@ chip soc/intel/alderlake
# EC memory map range is 0x900-0x9ff # EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901" register "gen3_dec" = "0x00fc0901"
# S0ix enable # S0ix enable
register "s0ix_enable" = "1" register "s0ix_enable" = "1"
# DPTF enable # DPTF enable
register "dptf_enable" = "1" register "dptf_enable" = "1"
@@ -85,33 +85,33 @@ chip soc/intel/alderlake
.i2c[0] = { .i2c[0] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 650, .rise_time_ns = 650,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .data_hold_time_ns = 50,
}, },
.i2c[1] = { .i2c[1] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 650, .rise_time_ns = 650,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .data_hold_time_ns = 50,
}, },
.i2c[2] = { .i2c[2] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 900, .rise_time_ns = 900,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .data_hold_time_ns = 50,
}, },
.i2c[3] = { .i2c[3] = {
.early_init = 1, .early_init = 1,
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 600, .rise_time_ns = 600,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .data_hold_time_ns = 50,
}, },
.i2c[5] = { .i2c[5] = {
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 650, .rise_time_ns = 650,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .data_hold_time_ns = 50,
}, },
}" }"

4
src/mainboard/google/brya/variants/brask/overridetree.cb
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@@ -1,6 +1,6 @@
chip soc/intel/alderlake chip soc/intel/alderlake
device domain 0 on device domain 0 on
end end
end end

2
src/mainboard/google/brya/variants/kano/overridetree.cb
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@@ -23,7 +23,7 @@ chip soc/intel/alderlake
#| I2C5 | Trackpad | #| I2C5 | Trackpad |
#+-------------------+---------------------------+ #+-------------------+---------------------------+
device domain 0 on device domain 0 on
device ref dtt on device ref dtt on
chip drivers/intel/dptf chip drivers/intel/dptf
## sensor information ## sensor information

2
src/mainboard/google/brya/variants/primus/overridetree.cb
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@@ -134,7 +134,7 @@ chip soc/intel/alderlake
device ref tcss_dma1 on device ref tcss_dma1 on
chip drivers/intel/usb4/retimer chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
use tcss_usb3_port3 as dfp[0].typec_port use tcss_usb3_port3 as dfp[0].typec_port
device generic 0 on end device generic 0 on end
end end
end end

12
src/mainboard/google/brya/variants/redrix/overridetree.cb
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@@ -14,7 +14,7 @@ fw_config
field DB_LTE 6 7 field DB_LTE 6 7
option LTE_ABSENT 0 option LTE_ABSENT 0
option LTE_USB 1 option LTE_USB 1
option LTE_PCIE 2 option LTE_PCIE 2
end end
end end
chip soc/intel/alderlake chip soc/intel/alderlake
@@ -124,7 +124,7 @@ chip soc/intel/alderlake
end end
end end
device ref ipu on device ref ipu on
chip drivers/intel/mipi_camera chip drivers/intel/mipi_camera
register "acpi_uid" = "0x50000" register "acpi_uid" = "0x50000"
register "acpi_name" = ""IPU0"" register "acpi_name" = ""IPU0""
register "device_type" = "INTEL_ACPI_CAMERA_CIO2" register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
@@ -258,7 +258,7 @@ chip soc/intel/alderlake
register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #EN_UCAM_PWR register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #EN_UCAM_PWR
register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
#_ON #_ON
register "on_seq.ops_cnt" = "5" register "on_seq.ops_cnt" = "5"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
@@ -272,7 +272,7 @@ chip soc/intel/alderlake
register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)" register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 36 on end device i2c 36 on end
end end
chip drivers/intel/mipi_camera chip drivers/intel/mipi_camera
register "acpi_hid" = "ACPI_DT_NAMESPACE_HID" register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
@@ -289,8 +289,8 @@ chip soc/intel/alderlake
register "nvm_width" = "0x10" register "nvm_width" = "0x10"
register "nvm_compat" = ""atmel,24c64"" register "nvm_compat" = ""atmel,24c64""
device i2c 50 on end device i2c 50 on end
end end
end end
device ref i2c5 on device ref i2c5 on