sb/amd/cimx/sb800: Postpone Sb_Poweron_Init() call

With LPC decode enables explicitly set in C env bootblock,
this call can be delayed to happen before AMD_INIT_RESET.

Change-Id: I3a28eaa2cf70b770b022760a2380ded0f43e9a6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>

src/mainboard/amd/inagua/romstage.c

@@ -15,11 +15,13 @@
 
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/kbc1100/kbc1100.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	kbc1100_early_init(0x2e);
 	kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }

src/mainboard/amd/persimmon/romstage.c

@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }

src/mainboard/amd/south_station/romstage.c

@@ -16,10 +16,12 @@
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
+#include <sb_cimx.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 	fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }

src/mainboard/amd/union_station/romstage.c

@@ -14,7 +14,9 @@
  */
 
 #include <northbridge/amd/agesa/state_machine.h>
+#include <sb_cimx.h>
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
+	sb_Poweron_Init();
 }