Make fam10 build (but not boot due to bootblock size problems.)

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson
2009-10-12 22:39:08 +00:00
parent b106f9bdbd
commit 3db199c00a
10 changed files with 128 additions and 51 deletions

View File

@ -1,4 +1,5 @@
subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207
subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940

View File

@ -28,16 +28,16 @@ config USE_DCACHE_RAM
config DCACHE_RAM_BASE
hex
default 0xc8000
default 0xc4000
depends on CPU_AMD_MODEL_10XXX
config DCACHE_RAM_SIZE
hex
default 0x08000
default 0x0c000
depends on CPU_AMD_MODEL_10XXX
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
default 0x04000
depends on CPU_AMD_MODEL_10XXX

View File

@ -0,0 +1 @@
obj-y += amd_sibling.o

View File

@ -35,10 +35,20 @@ config CAR_FAM10
config CBB
hex
default 0xff
default 0x0
depends on CPU_AMD_SOCKET_F_1207
config CDB
hex
default 0x0
default 0x18
depends on CPU_AMD_SOCKET_F_1207
config XIP_ROM_BASE
hex
default 0xfff80000
depends on CPU_AMD_SOCKET_F_1207
config XIP_ROM_SIZE
hex
default 0x80000
depends on CPU_AMD_SOCKET_F_1207

View File

@ -10,5 +10,6 @@ subdirs-y += ../../x86/mmx
subdirs-y += ../../x86/sse
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/pae
subdirs-y += ../../x86/smm