From 3dbf0c5c5f9a44a346ad6c1c0af69dca7d84ef97 Mon Sep 17 00:00:00 2001 From: Anastasios Koutian Date: Sat, 29 Jun 2024 09:12:08 +0100 Subject: [PATCH] cpu/intel/model_206ax: Allow package power limit clamping Setting the clamp bit allows the CPU to operate below the highest non-turbo frequency in order to obey the power limit. Tested on ThinkPad T420 with the i7-3940XM. Change-Id: Id0c0aedc29aca121d0fd1d8f8826089e13a026be Signed-off-by: Anastasios Koutian Reviewed-on: https://review.coreboot.org/c/coreboot/+/83270 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/cpu/intel/model_206ax/chip.h | 4 ++++ src/cpu/intel/model_206ax/model_206ax_init.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index f26fa61eca..1102cfeb9c 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -3,6 +3,8 @@ #ifndef __CPU_INTEL_MODEL_206AX_CHIP_H__ #define __CPU_INTEL_MODEL_206AX_CHIP_H__ +#include "stdbool.h" + /* Keep this in sync with acpi.c */ enum cpu_acpi_level { CPU_ACPI_DISABLED = 0, @@ -44,7 +46,9 @@ struct cpu_intel_model_206ax_config { int tcc_offset; /* TCC Activation Offset */ unsigned int pl1_mw; /* Long-term power limit in milliwatts */ + bool pl1_clamp; /* Long-term power limit clamping limitation */ unsigned int pl2_mw; /* Short-term power limit in milliwatts */ + bool pl2_clamp; /* Short-term power limit clamping limitation */ int pp0_current_limit; /* Primary Plane Current Limit (Icc) in Amps */ int pp1_current_limit; /* Secondary Plane Current Limit (IAXG) in Amps */ diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index aafb4dcbad..0d0e3f749a 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -141,6 +141,10 @@ void set_power_limits(u8 power_limit_1_time) /* Set long term power limit to TDP */ limit.lo |= tdp & PKG_POWER_LIMIT_MASK; } + if (conf->pl2_clamp) { + printk(BIOS_DEBUG, "Enabling PL1 clamping limitation\n"); + limit.lo |= PKG_POWER_LIMIT_CLAMP; + } limit.lo |= PKG_POWER_LIMIT_EN; limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) << PKG_POWER_LIMIT_TIME_SHIFT; @@ -153,6 +157,10 @@ void set_power_limits(u8 power_limit_1_time) /* Set short term power limit to 1.25 * TDP */ limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; } + if (conf->pl2_clamp) { + printk(BIOS_DEBUG, "Enabling PL2 clamping limitation\n"); + limit.hi |= PKG_POWER_LIMIT_CLAMP; + } limit.hi |= PKG_POWER_LIMIT_EN; /* Power limit 2 time is only programmable on SNB EP/EX */