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ChromeOS: Separate NVS from global GNVS

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Allocate chromeos_acpi in CBMEM separately from GNVS.

Change-Id: Ide55964ed53ea1d5b3c1c4e3ebd67286b7d568e4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Kyösti Mälkki
2021-03-16 19:01:48 +02:00
parent 5c124a97aa
commit 3dc1792f1d
7 changed files with 28 additions and 24 deletions
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20
src/vendorcode/google/chromeos/gnvs.c
View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <types.h>
#include <string.h>
#include <stdlib.h>
@ -16,7 +17,7 @@
#include "chromeos.h"
#include "gnvs.h"
static chromeos_acpi_t *chromeos_acpi;
static struct chromeos_acpi *chromeos_acpi;
static size_t chromeos_vpd_region(const char *region, uintptr_t *base)
{
@ -30,12 +31,14 @@ static size_t chromeos_vpd_region(const char *region, uintptr_t *base)
return region_device_sz(&vpd);
}
void chromeos_init_chromeos_acpi(chromeos_acpi_t *init)
void chromeos_init_chromeos_acpi(void)
{
size_t vpd_size;
uintptr_t vpd_base = 0;
chromeos_acpi = init;
chromeos_acpi = cbmem_add(CBMEM_ID_ACPI_CNVS, sizeof(struct chromeos_acpi));
if (!chromeos_acpi)
return;
vpd_size = chromeos_vpd_region("RO_VPD", &vpd_base);
if (vpd_size && vpd_base) {
@ -90,3 +93,12 @@ void smbios_type0_bios_version(uintptr_t address)
/* Location of smbios_type0.bios_version() string filled with spaces. */
chromeos_acpi->vbt10 = address;
}
void acpi_fill_cnvs(void)
{
const struct opregion cnvs_op = OPREGION("CNVS", SYSTEMMEMORY, (uintptr_t)chromeos_acpi,
sizeof(*chromeos_acpi));
acpigen_write_scope("\\");
acpigen_write_opregion(&cnvs_op);
acpigen_pop_len();
}

13
src/vendorcode/google/chromeos/gnvs.h
View File

@ -8,16 +8,9 @@
#define ACTIVE_ECFW_RO 0
#define ACTIVE_ECFW_RW 1
/*
* chromeos_acpi_t portion of ACPI GNVS is assumed to live at
* 0x100 - 0x1000.
*/
#define GNVS_CHROMEOS_ACPI_OFFSET 0x100
/* device_nvs_t is assumed to live directly after chromeos_acpi_t. */
#define GNVS_DEVICE_NVS_OFFSET 0x1000
typedef struct {
struct chromeos_acpi {
/* ChromeOS specific */
u32 vbt0; // 00 boot reason
u32 vbt1; // 04 active main firmware
@ -39,8 +32,8 @@ typedef struct {
u32 vpd_rw_base; // dce pointer to RW_VPD
u32 vpd_rw_size; // dd2 size of RW_VPD
u8 pad[298]; // dd6-eff
} __packed chromeos_acpi_t;
} __packed;
void chromeos_init_chromeos_acpi(chromeos_acpi_t *init);
void chromeos_init_chromeos_acpi(void);
#endif