acpi: Add functions to declare ARM GIC V3 hardware

For GICD and GICR a SOC needs to implement 2 callbacks to get the base
of those interrupt controllers.

For all the cpu GIC the code loops over all the DEVICE_PATH_GICC_V3
devices in a similar fashion to how x86 lapics are added. It's up to the
SOC to add those devices to the tree.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I5074d0a76316e854b7801e14b3241f88e805b02f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76132
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans
2023-06-27 16:44:59 +02:00
committed by Lean Sheng Tan
parent fca612497d
commit 3df6cc9de6
5 changed files with 106 additions and 0 deletions

View File

@@ -1566,6 +1566,9 @@ unsigned long acpi_create_madt_one_lapic(unsigned long current, u32 cpu, u32 api
unsigned long acpi_create_madt_lapic_nmis(unsigned long current);
uintptr_t platform_get_gicd_base(void);
uintptr_t platform_get_gicr_base(void);
int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
int acpi_create_srat_x2apic(acpi_srat_x2apic_t *x2apic, u32 node, u32 apic);
int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,