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soc/intel/cannonlake: Add early CPU initialization

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Add basic CPU initialization for bootblock, as well as relevant headers.

Change-Id: I318b7ea0f3aa5b5d28bf70784ccd20f2fe28cd86
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Andrey Petrov
2017-06-05 13:22:24 -07:00
committed by Aaron Durbin
parent 5b8987ae46
commit 3e2e0508c2
4 changed files with 129 additions and 0 deletions
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6
src/soc/intel/cannonlake/Kconfig
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@@ -11,6 +11,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select SOC_INTEL_COMMON_BLOCK_TIMER
select HAVE_MONOTONIC_TIMER
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
@@ -25,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CAR
select SOC_INTEL_COMMON_BLOCK_CPU
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_UART
@@ -64,4 +66,8 @@ config PCR_BASE_ADDRESS
help
This option allows you to select MMIO Base Address of sideband bus.
config CPU_BCLK_MHZ
int
default 100
endif