mb/google/brya/variant/hades: Reduce PEXVDD shutoff delay for Hades
For the sequenced controlled shutdown path, there's a 10ms delay after the PEXVDD rail is disabled to permit discharge needed on Agah/Proxima. This can be dropped to 3ms for Hades designs Proto0 and forward. Once Agah board is dropped, "if CONFIG" can be cleaned up/removed. BUG=b:271167335 TEST=builds Signed-off-by: Tarun Tuli <taruntuli@google.com> Change-Id: I8a0d62ec76caff861adce2d6c0ba2d4e4064affa Reviewed-on: https://review.coreboot.org/c/coreboot/+/75051 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -131,7 +131,11 @@ Method (GC6I, 0, Serialized)
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/* Ramp down PEXVDD */
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/* Ramp down PEXVDD */
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CTXS (GPIO_PEXVDD_PWR_EN)
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CTXS (GPIO_PEXVDD_PWR_EN)
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GPPL (GPIO_PEXVDD_PG, 0, 20)
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GPPL (GPIO_PEXVDD_PG, 0, 20)
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#if CONFIG(BOARD_GOOGLE_AGAH)
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Sleep (10)
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Sleep (10)
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#else
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Sleep (3)
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#endif
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/* Deassert EN_PPVAR_GPU_NVVDD */
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/* Deassert EN_PPVAR_GPU_NVVDD */
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CTXS (GPIO_NVVDD_PWR_EN)
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CTXS (GPIO_NVVDD_PWR_EN)
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@@ -272,7 +276,11 @@ Method (PGOF, 0, Serialized)
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/* Ramp down PEXVDD and let rail discharge to <10% */
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/* Ramp down PEXVDD and let rail discharge to <10% */
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CTXS (GPIO_PEXVDD_PWR_EN)
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CTXS (GPIO_PEXVDD_PWR_EN)
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GPPL (GPIO_PEXVDD_PG, 0, 20)
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GPPL (GPIO_PEXVDD_PG, 0, 20)
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#if CONFIG(BOARD_GOOGLE_AGAH)
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Sleep (10)
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Sleep (10)
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#else
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Sleep (3)
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#endif
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/* Ramp down NVVDD and let rail discharge to <10% */
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/* Ramp down NVVDD and let rail discharge to <10% */
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CTXS (GPIO_NVVDD_PWR_EN)
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CTXS (GPIO_NVVDD_PWR_EN)
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@@ -61,7 +61,7 @@ static struct power_rail_sequence gpu_on_seq[] = {
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/* In GCOFF entry order (i.e., power-off order) */
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/* In GCOFF entry order (i.e., power-off order) */
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static struct power_rail_sequence gpu_off_seq[] = {
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static struct power_rail_sequence gpu_off_seq[] = {
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{ "FBVDD", FBVDD_PWR_EN, false, FBVDD_PG, 0,},
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{ "FBVDD", FBVDD_PWR_EN, false, FBVDD_PG, 0,},
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{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 10,},
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{ "PEXVDD", PEXVDD_PWR_EN, false, PEXVDD_PG, 3,},
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{ "NVVDD+MSVDD", NVVDD_PWR_EN, false, NVVDD_PG, 2,},
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{ "NVVDD+MSVDD", NVVDD_PWR_EN, false, NVVDD_PG, 2,},
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{ "GPU 3.3V", GPU_3V3_PWR_EN, false, GPU_3V3_PG, 4,},
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{ "GPU 3.3V", GPU_3V3_PWR_EN, false, GPU_3V3_PG, 4,},
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{ "GPU 1.8V", GPU_1V8_PWR_EN, false, GPU_1V8_PG, 0,},
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{ "GPU 1.8V", GPU_1V8_PWR_EN, false, GPU_1V8_PG, 0,},
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