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Change-Id: I7fa27a2cbc73b4acae41373a51f600f32b9002bf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki
2019-03-04 08:09:20 +02:00
committed by Patrick Georgi
parent 4886cfc50a
commit 3e41b9b22e
3 changed files with 0 additions and 172 deletions
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31
src/southbridge/intel/i82801dx/tco_timer.c
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@@ -1,31 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
static void i82801dx_halt_tco_timer(void)
{
/* Set the LPC device statically. */
pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x0);
/* Temporarily set ACPI base address (I/O space). */
pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));
/* Enable ACPI I/O. */
pci_write_config8(dev, ACPI_CNTL, 0x10);
/* Halt the TCO timer, preventing SMI and automatic reboot */
outw(inw(PMBASE_ADDR + TCOBASE + TCO1_CNT) | (1 << 11),
PMBASE_ADDR + TCOBASE + TCO1_CNT);
}