soc/amd: Add DBG2 ACPI table
Dump the DBG2 table on Linux console. $> acpidump -s ACPI: DBG2 0x0000000000000000 000054 (v00 COREv4 COREBOOT 00000000 **) $> acpidump > acpidump.bin $> acpixtract -a acpidump.bin $> iasl -d dbg2.dat $> cat dbg2.dsl /* * ACPI Data Table [DBG2] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "DBG2" [Debug Port table type 2] [004h 0004 4] Table Length : 00000054 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : FA [00Ah 0010 6] Oem ID : "COREv4" [010h 0016 8] Oem Table ID : "COREBOOT" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "CORE" [020h 0032 4] Asl Compiler Revision : 20220331 [024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000001 [02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 0028 [02Fh 0047 1] Register Count : 01 [030h 0048 2] Namepath Length : 0002 [032h 0050 2] Namepath Offset : 0026 [034h 0052 2] OEM Data Length : 0000 [Optional field not present] [036h 0054 2] OEM Data Offset : 0000 [Optional field not present] [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0012 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 0022 [042h 006612] Base Address Register : [Generic Address Structure] [042h 0066 1] Space ID : 00 [SystemMemory] [043h 0067 1] Bit Width : 00 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 00000000FEDC9000 [04Eh 0078 4] Address Size : 00000100 [052h 0082 2] Namepath : "." Raw Table Data: Length 84 (0x54) 00: 44 42 47 32 54 00 00 00 00 FA 43 4F 52 45 76 34 // DBG2T.....COREv4 10: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45 // COREBOOT....CORE 20: 31 03 22 20 2C 00 00 00 01 00 00 00 00 28 00 01 // 1." ,........(.. 30: 02 00 26 00 00 00 00 00 00 80 12 00 00 00 16 00 // ..&............. 40: 22 00 00 00 00 03 00 90 DC FE 00 00 00 00 00 01 // "............... 50: 00 00 2E 00 // .... BUG=b:303689867 Change-Id: I3c97a78d1889549421baf0bc1a2e8f959a0f47e2 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79174 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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		| @@ -896,6 +896,14 @@ unsigned long acpi_pl011_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long curren | |||||||
| 				    name); | 				    name); | ||||||
| } | } | ||||||
|  |  | ||||||
|  | unsigned long acpi_16550_mmio32_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long current, | ||||||
|  | 					 uint64_t base, const char *name) | ||||||
|  | { | ||||||
|  | 	return acpi_write_dbg2_uart(rsdp, current, ACPI_ADDRESS_SPACE_MEMORY, base, | ||||||
|  | 				    0x100, ACPI_ACCESS_SIZE_DWORD_ACCESS, | ||||||
|  | 				    name); | ||||||
|  | } | ||||||
|  |  | ||||||
| static void acpi_create_facs(void *header) | static void acpi_create_facs(void *header) | ||||||
| { | { | ||||||
| 	acpi_facs_t *facs = header; | 	acpi_facs_t *facs = header; | ||||||
|   | |||||||
| @@ -1659,6 +1659,8 @@ unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current, | |||||||
| 				       const struct device *dev, uint8_t access_size); | 				       const struct device *dev, uint8_t access_size); | ||||||
| unsigned long acpi_pl011_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long current, | unsigned long acpi_pl011_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long current, | ||||||
| 					 uint64_t base, const char *name); | 					 uint64_t base, const char *name); | ||||||
|  | unsigned long acpi_16550_mmio32_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long current, | ||||||
|  | 					 uint64_t base, const char *name); | ||||||
|  |  | ||||||
| void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags, | void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags, | ||||||
| 		      unsigned long (*acpi_fill_dmar)(unsigned long)); | 		      unsigned long (*acpi_fill_dmar)(unsigned long)); | ||||||
|   | |||||||
| @@ -4,11 +4,18 @@ | |||||||
| #include <acpi/acpigen.h> | #include <acpi/acpigen.h> | ||||||
| #include <amdblocks/acpi.h> | #include <amdblocks/acpi.h> | ||||||
| #include <device/device.h> | #include <device/device.h> | ||||||
|  | #include <console/uart.h> | ||||||
| #include <types.h> | #include <types.h> | ||||||
|  |  | ||||||
| unsigned long southbridge_write_acpi_tables(const struct device *device, | unsigned long southbridge_write_acpi_tables(const struct device *device, | ||||||
| 		unsigned long current, | 		unsigned long current, | ||||||
| 		struct acpi_rsdp *rsdp) | 		struct acpi_rsdp *rsdp) | ||||||
| { | { | ||||||
| 	return acpi_write_hpet(device, current, rsdp); | 	current = acpi_write_hpet(device, current, rsdp); | ||||||
|  |  | ||||||
|  | 	if (CONFIG(AMD_SOC_CONSOLE_UART)) | ||||||
|  | 		current = acpi_16550_mmio32_write_dbg2_uart(rsdp, current, | ||||||
|  | 			uart_platform_base(get_uart_for_console()), NULL); | ||||||
|  |  | ||||||
|  | 	return current; | ||||||
| } | } | ||||||
|   | |||||||
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